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cmd/compile: intrinsify runtime/internal/atomic.{And,Or}{8,} on RISCV64
The 32 bit versions are easily implement with a single instruction, while the 8 bit versions require a bit more effort but use the same atomic instructions via rewrite rules. Change-Id: I42e8d457b239c8f75e39a8e282fc88c1bb292a99 Reviewed-on: https://go-review.googlesource.com/c/go/+/268098 Trust: Joel Sing <joel@sing.id.au> Run-TryBot: Joel Sing <joel@sing.id.au> TryBot-Result: Go Bot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
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@ -510,6 +510,14 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p6 := s.Prog(obj.ANOP)
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p2.To.SetTarget(p6)
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case ssa.OpRISCV64LoweredAtomicAnd32, ssa.OpRISCV64LoweredAtomicOr32:
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p := s.Prog(v.Op.Asm())
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p.From.Type = obj.TYPE_REG
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p.From.Reg = v.Args[1].Reg()
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p.To.Type = obj.TYPE_MEM
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p.To.Reg = v.Args[0].Reg()
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p.RegTo2 = riscv.REG_ZERO
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case ssa.OpRISCV64LoweredZero:
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mov, sz := largestMove(v.AuxInt)
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@ -564,12 +564,28 @@
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(AtomicAdd32 ...) => (LoweredAtomicAdd32 ...)
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(AtomicAdd64 ...) => (LoweredAtomicAdd64 ...)
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// AtomicAnd8(ptr,val) => LoweredAtomicAnd32(ptr&^3, ^((uint8(val) ^ 0xff) << ((ptr & 3) * 8)))
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(AtomicAnd8 ptr val mem) =>
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(LoweredAtomicAnd32 (ANDI <typ.Uintptr> [^3] ptr)
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(NOT <typ.UInt32> (SLL <typ.UInt32> (XORI <typ.UInt32> [0xff] (ZeroExt8to32 val))
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(SLLI <typ.UInt64> [3] (ANDI <typ.UInt64> [3] ptr)))) mem)
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(AtomicAnd32 ...) => (LoweredAtomicAnd32 ...)
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(AtomicCompareAndSwap32 ...) => (LoweredAtomicCas32 ...)
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(AtomicCompareAndSwap64 ...) => (LoweredAtomicCas64 ...)
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(AtomicExchange32 ...) => (LoweredAtomicExchange32 ...)
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(AtomicExchange64 ...) => (LoweredAtomicExchange64 ...)
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// AtomicOr8(ptr,val) => LoweredAtomicOr32(ptr&^3, uint32(val)<<((ptr&3)*8))
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(AtomicOr8 ptr val mem) =>
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(LoweredAtomicOr32 (ANDI <typ.Uintptr> [^3] ptr)
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(SLL <typ.UInt32> (ZeroExt8to32 val)
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(SLLI <typ.UInt64> [3] (ANDI <typ.UInt64> [3] ptr))) mem)
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(AtomicOr32 ...) => (LoweredAtomicOr32 ...)
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// Conditional branches
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(If cond yes no) => (BNEZ cond yes no)
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@ -126,6 +126,7 @@ func init() {
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gp11sb = regInfo{inputs: []regMask{gpspsbMask}, outputs: []regMask{gpMask}}
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gpxchg = regInfo{inputs: []regMask{gpspsbgMask, gpgMask}, outputs: []regMask{gpMask}}
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gpcas = regInfo{inputs: []regMask{gpspsbgMask, gpgMask, gpgMask}, outputs: []regMask{gpMask}}
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gpatomic = regInfo{inputs: []regMask{gpspsbgMask, gpgMask}}
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fp11 = regInfo{inputs: []regMask{fpMask}, outputs: []regMask{fpMask}}
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fp21 = regInfo{inputs: []regMask{fpMask, fpMask}, outputs: []regMask{fpMask}}
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@ -335,7 +336,7 @@ func init() {
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{name: "LoweredAtomicLoad64", argLength: 2, reg: gpload, faultOnNilArg0: true},
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// Atomic stores.
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// store arg1 to arg0. arg2=mem. returns memory.
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// store arg1 to *arg0. arg2=mem. returns memory.
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{name: "LoweredAtomicStore8", argLength: 3, reg: gpstore, faultOnNilArg0: true, hasSideEffects: true},
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{name: "LoweredAtomicStore32", argLength: 3, reg: gpstore, faultOnNilArg0: true, hasSideEffects: true},
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{name: "LoweredAtomicStore64", argLength: 3, reg: gpstore, faultOnNilArg0: true, hasSideEffects: true},
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@ -367,6 +368,11 @@ func init() {
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{name: "LoweredAtomicCas32", argLength: 4, reg: gpcas, resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true, unsafePoint: true},
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{name: "LoweredAtomicCas64", argLength: 4, reg: gpcas, resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true, unsafePoint: true},
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// Atomic 32 bit AND/OR.
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// *arg0 &= (|=) arg1. arg2=mem. returns nil.
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{name: "LoweredAtomicAnd32", argLength: 3, reg: gpatomic, asm: "AMOANDW", faultOnNilArg0: true, hasSideEffects: true},
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{name: "LoweredAtomicOr32", argLength: 3, reg: gpatomic, asm: "AMOORW", faultOnNilArg0: true, hasSideEffects: true},
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// Lowering pass-throughs
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{name: "LoweredNilCheck", argLength: 2, faultOnNilArg0: true, nilCheck: true, reg: regInfo{inputs: []regMask{gpspMask}}}, // arg0=ptr,arg1=mem, returns void. Faults if ptr is nil.
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{name: "LoweredGetClosurePtr", reg: regInfo{outputs: []regMask{regCtxt}}}, // scheduler ensures only at beginning of entry block
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@ -2149,6 +2149,8 @@ const (
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OpRISCV64LoweredAtomicAdd64
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OpRISCV64LoweredAtomicCas32
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OpRISCV64LoweredAtomicCas64
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OpRISCV64LoweredAtomicAnd32
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OpRISCV64LoweredAtomicOr32
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OpRISCV64LoweredNilCheck
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OpRISCV64LoweredGetClosurePtr
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OpRISCV64LoweredGetCallerSP
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@ -28722,6 +28724,32 @@ var opcodeTable = [...]opInfo{
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},
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},
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},
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{
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name: "LoweredAtomicAnd32",
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argLen: 3,
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faultOnNilArg0: true,
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hasSideEffects: true,
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asm: riscv.AAMOANDW,
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reg: regInfo{
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inputs: []inputInfo{
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{1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30
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{0, 9223372037928517622}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 SB
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},
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},
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},
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{
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name: "LoweredAtomicOr32",
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argLen: 3,
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faultOnNilArg0: true,
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hasSideEffects: true,
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asm: riscv.AAMOORW,
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reg: regInfo{
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inputs: []inputInfo{
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{1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30
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{0, 9223372037928517622}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 SB
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},
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},
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},
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{
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name: "LoweredNilCheck",
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argLen: 2,
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@ -52,6 +52,11 @@ func rewriteValueRISCV64(v *Value) bool {
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case OpAtomicAdd64:
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v.Op = OpRISCV64LoweredAtomicAdd64
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return true
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case OpAtomicAnd32:
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v.Op = OpRISCV64LoweredAtomicAnd32
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return true
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case OpAtomicAnd8:
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return rewriteValueRISCV64_OpAtomicAnd8(v)
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case OpAtomicCompareAndSwap32:
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v.Op = OpRISCV64LoweredAtomicCas32
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return true
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@ -76,6 +81,11 @@ func rewriteValueRISCV64(v *Value) bool {
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case OpAtomicLoadPtr:
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v.Op = OpRISCV64LoweredAtomicLoad64
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return true
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case OpAtomicOr32:
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v.Op = OpRISCV64LoweredAtomicOr32
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return true
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case OpAtomicOr8:
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return rewriteValueRISCV64_OpAtomicOr8(v)
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case OpAtomicStore32:
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v.Op = OpRISCV64LoweredAtomicStore32
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return true
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@ -681,6 +691,71 @@ func rewriteValueRISCV64_OpAddr(v *Value) bool {
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return true
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}
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}
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func rewriteValueRISCV64_OpAtomicAnd8(v *Value) bool {
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v_2 := v.Args[2]
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v_1 := v.Args[1]
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v_0 := v.Args[0]
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b := v.Block
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typ := &b.Func.Config.Types
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// match: (AtomicAnd8 ptr val mem)
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// result: (LoweredAtomicAnd32 (ANDI <typ.Uintptr> [^3] ptr) (NOT <typ.UInt32> (SLL <typ.UInt32> (XORI <typ.UInt32> [0xff] (ZeroExt8to32 val)) (SLLI <typ.UInt64> [3] (ANDI <typ.UInt64> [3] ptr)))) mem)
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for {
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ptr := v_0
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val := v_1
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mem := v_2
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v.reset(OpRISCV64LoweredAtomicAnd32)
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v0 := b.NewValue0(v.Pos, OpRISCV64ANDI, typ.Uintptr)
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v0.AuxInt = int64ToAuxInt(^3)
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v0.AddArg(ptr)
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v1 := b.NewValue0(v.Pos, OpRISCV64NOT, typ.UInt32)
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v2 := b.NewValue0(v.Pos, OpRISCV64SLL, typ.UInt32)
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v3 := b.NewValue0(v.Pos, OpRISCV64XORI, typ.UInt32)
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v3.AuxInt = int64ToAuxInt(0xff)
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v4 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
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v4.AddArg(val)
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v3.AddArg(v4)
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v5 := b.NewValue0(v.Pos, OpRISCV64SLLI, typ.UInt64)
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v5.AuxInt = int64ToAuxInt(3)
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v6 := b.NewValue0(v.Pos, OpRISCV64ANDI, typ.UInt64)
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v6.AuxInt = int64ToAuxInt(3)
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v6.AddArg(ptr)
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v5.AddArg(v6)
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v2.AddArg2(v3, v5)
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v1.AddArg(v2)
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v.AddArg3(v0, v1, mem)
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return true
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}
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}
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func rewriteValueRISCV64_OpAtomicOr8(v *Value) bool {
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v_2 := v.Args[2]
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v_1 := v.Args[1]
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v_0 := v.Args[0]
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b := v.Block
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typ := &b.Func.Config.Types
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// match: (AtomicOr8 ptr val mem)
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// result: (LoweredAtomicOr32 (ANDI <typ.Uintptr> [^3] ptr) (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLI <typ.UInt64> [3] (ANDI <typ.UInt64> [3] ptr))) mem)
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for {
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ptr := v_0
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val := v_1
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mem := v_2
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v.reset(OpRISCV64LoweredAtomicOr32)
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v0 := b.NewValue0(v.Pos, OpRISCV64ANDI, typ.Uintptr)
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v0.AuxInt = int64ToAuxInt(^3)
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v0.AddArg(ptr)
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v1 := b.NewValue0(v.Pos, OpRISCV64SLL, typ.UInt32)
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v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
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v2.AddArg(val)
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v3 := b.NewValue0(v.Pos, OpRISCV64SLLI, typ.UInt64)
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v3.AuxInt = int64ToAuxInt(3)
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v4 := b.NewValue0(v.Pos, OpRISCV64ANDI, typ.UInt64)
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v4.AuxInt = int64ToAuxInt(3)
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v4.AddArg(ptr)
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v3.AddArg(v4)
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v1.AddArg2(v2, v3)
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v.AddArg3(v0, v1, mem)
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return true
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}
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}
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func rewriteValueRISCV64_OpAvg64u(v *Value) bool {
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v_1 := v.Args[1]
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v_0 := v.Args[0]
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