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cmd/compile: improve bit test code
Some bit test instruction generation stopped triggering after the change to addressing modes. I suspect this was just because ANDQload was being generated before the rewrite rules could discover the BTQ. Fix that by decomposing the ANDQload when it is surrounded by a TESTQ (thus re-enabling the BTQ rules). Fixes #44228 Change-Id: I489b4a5a7eb01c65fc8db0753f8cec54097cadb2 Reviewed-on: https://go-review.googlesource.com/c/go/+/291749 Trust: Keith Randall <khr@golang.org> Trust: Josh Bleecher Snyder <josharian@gmail.com> Run-TryBot: Keith Randall <khr@golang.org> Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
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@ -2191,6 +2191,11 @@
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&& clobber(l) =>
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@l.Block (CMP(Q|L|W|B)constload {sym} [makeValAndOff64(0, int64(off))] ptr mem)
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// Convert ANDload to MOVload when we can do the AND in a containing TEST op.
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// Only do when it's within the same block, so we don't have flags live across basic block boundaries.
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// See issue 44228.
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(TEST(Q|L) a:(AND(Q|L)load [off] {sym} x ptr mem) a) && a.Uses == 2 && a.Block == v.Block && clobber(a) => (TEST(Q|L) (MOV(Q|L)load <a.Type> [off] {sym} ptr mem) x)
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(MOVBload [off] {sym} (SB) _) && symIsRO(sym) => (MOVLconst [int32(read8(sym, int64(off)))])
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(MOVWload [off] {sym} (SB) _) && symIsRO(sym) => (MOVLconst [int32(read16(sym, int64(off), config.ctxt.Arch.ByteOrder))])
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(MOVLload [off] {sym} (SB) _) && symIsRO(sym) => (MOVQconst [int64(read32(sym, int64(off), config.ctxt.Arch.ByteOrder))])
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@ -27141,6 +27141,33 @@ func rewriteValueAMD64_OpAMD64TESTL(v *Value) bool {
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}
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break
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}
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// match: (TESTL a:(ANDLload [off] {sym} x ptr mem) a)
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// cond: a.Uses == 2 && a.Block == v.Block && clobber(a)
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// result: (TESTL (MOVLload <a.Type> [off] {sym} ptr mem) x)
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for {
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for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
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a := v_0
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if a.Op != OpAMD64ANDLload {
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continue
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}
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off := auxIntToInt32(a.AuxInt)
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sym := auxToSym(a.Aux)
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mem := a.Args[2]
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x := a.Args[0]
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ptr := a.Args[1]
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if a != v_1 || !(a.Uses == 2 && a.Block == v.Block && clobber(a)) {
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continue
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}
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v.reset(OpAMD64TESTL)
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v0 := b.NewValue0(a.Pos, OpAMD64MOVLload, a.Type)
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v0.AuxInt = int32ToAuxInt(off)
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v0.Aux = symToAux(sym)
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v0.AddArg2(ptr, mem)
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v.AddArg2(v0, x)
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return true
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}
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break
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}
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return false
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}
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func rewriteValueAMD64_OpAMD64TESTLconst(v *Value) bool {
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@ -27246,6 +27273,33 @@ func rewriteValueAMD64_OpAMD64TESTQ(v *Value) bool {
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}
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break
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}
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// match: (TESTQ a:(ANDQload [off] {sym} x ptr mem) a)
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// cond: a.Uses == 2 && a.Block == v.Block && clobber(a)
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// result: (TESTQ (MOVQload <a.Type> [off] {sym} ptr mem) x)
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for {
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for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
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a := v_0
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if a.Op != OpAMD64ANDQload {
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continue
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}
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off := auxIntToInt32(a.AuxInt)
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sym := auxToSym(a.Aux)
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mem := a.Args[2]
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x := a.Args[0]
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ptr := a.Args[1]
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if a != v_1 || !(a.Uses == 2 && a.Block == v.Block && clobber(a)) {
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continue
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}
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v.reset(OpAMD64TESTQ)
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v0 := b.NewValue0(a.Pos, OpAMD64MOVQload, a.Type)
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v0.AuxInt = int32ToAuxInt(off)
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v0.Aux = symToAux(sym)
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v0.AddArg2(ptr, mem)
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v.AddArg2(v0, x)
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return true
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}
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break
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}
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return false
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}
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func rewriteValueAMD64_OpAMD64TESTQconst(v *Value) bool {
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@ -352,3 +352,12 @@ func cont0Mask64U(x uint64) uint64 {
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// s390x:"RISBGZ\t[$]48, [$]15, [$]0,"
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return x & 0xffff00000000ffff
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}
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func issue44228a(a []int64, i int) bool {
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// amd64: "BTQ", -"SHL"
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return a[i>>6]&(1<<(i&63)) != 0
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}
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func issue44228b(a []int32, i int) bool {
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// amd64: "BTL", -"SHL"
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return a[i>>5]&(1<<(i&31)) != 0
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}
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