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cmd/compile: use ellipses in S390X rules
Also, explicitly zero AuxInt in some ops (like Div), to make it clear why they do not use an ellipsis. Passes toolstash-check -all. Change-Id: I47b4ed745196ed734927dbb5923edec33ce286da Reviewed-on: https://go-review.googlesource.com/c/go/+/217013 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Michael Munday <mike.munday@ibm.com>
This commit is contained in:
Josh Bleecher Snyder
parent
3abec31097
commit
3a9381c6b0
@ -3,27 +3,27 @@
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// license that can be found in the LICENSE file.
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// Lowering arithmetic
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(Add(64|Ptr) x y) -> (ADD x y)
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(Add(32|16|8) x y) -> (ADDW x y)
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(Add32F x y) -> (FADDS x y)
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(Add64F x y) -> (FADD x y)
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(Add(64|Ptr) ...) -> (ADD ...)
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(Add(32|16|8) ...) -> (ADDW ...)
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(Add32F ...) -> (FADDS ...)
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(Add64F ...) -> (FADD ...)
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(Sub(64|Ptr) x y) -> (SUB x y)
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(Sub(32|16|8) x y) -> (SUBW x y)
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(Sub32F x y) -> (FSUBS x y)
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(Sub64F x y) -> (FSUB x y)
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(Sub(64|Ptr) ...) -> (SUB ...)
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(Sub(32|16|8) ...) -> (SUBW ...)
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(Sub32F ...) -> (FSUBS ...)
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(Sub64F ...) -> (FSUB ...)
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(Mul64 x y) -> (MULLD x y)
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(Mul(32|16|8) x y) -> (MULLW x y)
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(Mul32F x y) -> (FMULS x y)
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(Mul64F x y) -> (FMUL x y)
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(Mul64uhilo x y) -> (MLGR x y)
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(Mul64 ...) -> (MULLD ...)
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(Mul(32|16|8) ...) -> (MULLW ...)
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(Mul32F ...) -> (FMULS ...)
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(Mul64F ...) -> (FMUL ...)
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(Mul64uhilo ...) -> (MLGR ...)
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(Div32F x y) -> (FDIVS x y)
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(Div64F x y) -> (FDIV x y)
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(Div32F ...) -> (FDIVS ...)
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(Div64F ...) -> (FDIV ...)
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(Div64 x y) -> (DIVD x y)
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(Div64u x y) -> (DIVDU x y)
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(Div64 [a] x y) -> (DIVD x y)
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(Div64u ...) -> (DIVDU ...)
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// DIVW/DIVWU has a 64-bit dividend and a 32-bit divisor,
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// so a sign/zero extension of the dividend is required.
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(Div32 x y) -> (DIVW (MOVWreg x) y)
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@ -33,11 +33,12 @@
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(Div8 x y) -> (DIVW (MOVBreg x) (MOVBreg y))
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(Div8u x y) -> (DIVWU (MOVBZreg x) (MOVBZreg y))
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(Hmul(64|64u) x y) -> (MULH(D|DU) x y)
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(Hmul(64|64u) ...) -> (MULH(D|DU) ...)
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(Hmul32 x y) -> (SRDconst [32] (MULLD (MOVWreg x) (MOVWreg y)))
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(Hmul32u x y) -> (SRDconst [32] (MULLD (MOVWZreg x) (MOVWZreg y)))
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(Mod(64|64u) x y) -> (MOD(D|DU) x y)
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(Mod64 [a] x y) -> (MODD x y)
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(Mod64u ...) -> (MODDU ...)
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// MODW/MODWU has a 64-bit dividend and a 32-bit divisor,
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// so a sign/zero extension of the dividend is required.
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(Mod32 x y) -> (MODW (MOVWreg x) y)
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@ -50,28 +51,28 @@
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// (x + y) / 2 with x>=y -> (x - y) / 2 + y
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(Avg64u <t> x y) -> (ADD (SRDconst <t> (SUB <t> x y) [1]) y)
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(And64 x y) -> (AND x y)
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(And(32|16|8) x y) -> (ANDW x y)
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(And64 ...) -> (AND ...)
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(And(32|16|8) ...) -> (ANDW ...)
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(Or64 x y) -> (OR x y)
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(Or(32|16|8) x y) -> (ORW x y)
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(Or64 ...) -> (OR ...)
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(Or(32|16|8) ...) -> (ORW ...)
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(Xor64 x y) -> (XOR x y)
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(Xor(32|16|8) x y) -> (XORW x y)
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(Xor64 ...) -> (XOR ...)
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(Xor(32|16|8) ...) -> (XORW ...)
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(Neg64 x) -> (NEG x)
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(Neg(32|16|8) x) -> (NEGW x)
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(Neg32F x) -> (FNEGS x)
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(Neg64F x) -> (FNEG x)
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(Neg64 ...) -> (NEG ...)
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(Neg(32|16|8) ...) -> (NEGW ...)
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(Neg32F ...) -> (FNEGS ...)
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(Neg64F ...) -> (FNEG ...)
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(Com64 x) -> (NOT x)
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(Com(32|16|8) x) -> (NOTW x)
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(NOT x) && true -> (XOR (MOVDconst [-1]) x)
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(NOTW x) && true -> (XORWconst [-1] x)
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(Com64 ...) -> (NOT ...)
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(Com(32|16|8) ...) -> (NOTW ...)
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(NOT x) -> (XOR (MOVDconst [-1]) x)
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(NOTW x) -> (XORWconst [-1] x)
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// Lowering boolean ops
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(AndB x y) -> (ANDW x y)
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(OrB x y) -> (ORW x y)
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(AndB ...) -> (ANDW ...)
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(OrB ...) -> (ORW ...)
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(Not x) -> (XORWconst [1] x)
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// Lowering pointer arithmetic
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@ -80,8 +81,8 @@
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(OffPtr [off] ptr) -> (ADD (MOVDconst [off]) ptr)
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// TODO: optimize these cases?
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(Ctz64NonZero x) -> (Ctz64 x)
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(Ctz32NonZero x) -> (Ctz32 x)
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(Ctz64NonZero ...) -> (Ctz64 ...)
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(Ctz32NonZero ...) -> (Ctz32 ...)
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// Ctz(x) = 64 - findLeftmostOne((x-1)&^x)
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(Ctz64 <t> x) -> (SUB (MOVDconst [64]) (FLOGR (AND <t> (SUBconst <t> [1] x) (NOT <t> x))))
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@ -117,8 +118,8 @@
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(SumBytes4 x) -> (SumBytes2 (ADDW <typ.UInt16> (SRWconst <typ.UInt16> x [16]) x))
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(SumBytes8 x) -> (SumBytes4 (ADDW <typ.UInt32> (SRDconst <typ.UInt32> x [32]) x))
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(Bswap64 x) -> (MOVDBR x)
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(Bswap32 x) -> (MOVWBR x)
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(Bswap64 ...) -> (MOVDBR ...)
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(Bswap32 ...) -> (MOVWBR ...)
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// add with carry
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(Select0 (Add64carry x y c))
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@ -133,7 +134,7 @@
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-> (NEG (Select0 <typ.UInt64> (SUBE (MOVDconst [0]) (MOVDconst [0]) (Select1 <types.TypeFlags> (SUBE x y (Select1 <types.TypeFlags> (SUBC (MOVDconst [0]) c)))))))
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// math package intrinsics
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(Sqrt x) -> (FSQRT x)
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(Sqrt ...) -> (FSQRT ...)
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(Floor x) -> (FIDBR [7] x)
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(Ceil x) -> (FIDBR [6] x)
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(Trunc x) -> (FIDBR [5] x)
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@ -145,11 +146,11 @@
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// The SYNC instruction (fast-BCR-serialization) prevents store-load
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// reordering. Other sequences of memory operations (load-load,
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// store-store and load-store) are already guaranteed not to be reordered.
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(AtomicLoad(8|32|Acq32|64|Ptr) ptr mem) -> (MOV(BZ|WZ|WZ|D|D)atomicload ptr mem)
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(AtomicLoad(8|32|Acq32|64|Ptr) ...) -> (MOV(BZ|WZ|WZ|D|D)atomicload ...)
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(AtomicStore(8|32|64|PtrNoWB) ptr val mem) -> (SYNC (MOV(B|W|D|D)atomicstore ptr val mem))
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// Store-release doesn't require store-load ordering.
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(AtomicStoreRel32 ptr val mem) -> (MOVWatomicstore ptr val mem)
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(AtomicStoreRel32 ...) -> (MOVWatomicstore ...)
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// Atomic adds.
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(AtomicAdd32 ptr val mem) -> (AddTupleFirst32 val (LAA ptr val mem))
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@ -160,12 +161,12 @@
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(Select1 (AddTupleFirst64 _ tuple)) -> (Select1 tuple)
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// Atomic exchanges.
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(AtomicExchange32 ptr val mem) -> (LoweredAtomicExchange32 ptr val mem)
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(AtomicExchange64 ptr val mem) -> (LoweredAtomicExchange64 ptr val mem)
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(AtomicExchange32 ...) -> (LoweredAtomicExchange32 ...)
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(AtomicExchange64 ...) -> (LoweredAtomicExchange64 ...)
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// Atomic compare and swap.
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(AtomicCompareAndSwap32 ptr old new_ mem) -> (LoweredAtomicCas32 ptr old new_ mem)
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(AtomicCompareAndSwap64 ptr old new_ mem) -> (LoweredAtomicCas64 ptr old new_ mem)
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(AtomicCompareAndSwap32 ...) -> (LoweredAtomicCas32 ...)
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(AtomicCompareAndSwap64 ...) -> (LoweredAtomicCas64 ...)
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// Atomic and: *(*uint8)(ptr) &= val
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//
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@ -199,37 +200,37 @@
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// Lowering extension
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// Note: we always extend to 64 bits even though some ops don't need that many result bits.
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(SignExt8to(16|32|64) x) -> (MOVBreg x)
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(SignExt16to(32|64) x) -> (MOVHreg x)
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(SignExt32to64 x) -> (MOVWreg x)
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(SignExt8to(16|32|64) ...) -> (MOVBreg ...)
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(SignExt16to(32|64) ...) -> (MOVHreg ...)
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(SignExt32to64 ...) -> (MOVWreg ...)
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(ZeroExt8to(16|32|64) x) -> (MOVBZreg x)
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(ZeroExt16to(32|64) x) -> (MOVHZreg x)
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(ZeroExt32to64 x) -> (MOVWZreg x)
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(ZeroExt8to(16|32|64) ...) -> (MOVBZreg ...)
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(ZeroExt16to(32|64) ...) -> (MOVHZreg ...)
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(ZeroExt32to64 ...) -> (MOVWZreg ...)
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(Slicemask <t> x) -> (SRADconst (NEG <t> x) [63])
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// Lowering truncation
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// Because we ignore high parts of registers, truncates are just copies.
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(Trunc(16|32|64)to8 x) -> x
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(Trunc(32|64)to16 x) -> x
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(Trunc64to32 x) -> x
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(Trunc(16|32|64)to8 ...) -> (Copy ...)
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(Trunc(32|64)to16 ...) -> (Copy ...)
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(Trunc64to32 ...) -> (Copy ...)
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// Lowering float <-> int
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(Cvt32to32F x) -> (CEFBRA x)
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(Cvt32to64F x) -> (CDFBRA x)
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(Cvt64to32F x) -> (CEGBRA x)
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(Cvt64to64F x) -> (CDGBRA x)
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(Cvt32to32F ...) -> (CEFBRA ...)
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(Cvt32to64F ...) -> (CDFBRA ...)
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(Cvt64to32F ...) -> (CEGBRA ...)
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(Cvt64to64F ...) -> (CDGBRA ...)
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(Cvt32Fto32 x) -> (CFEBRA x)
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(Cvt32Fto64 x) -> (CGEBRA x)
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(Cvt64Fto32 x) -> (CFDBRA x)
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(Cvt64Fto64 x) -> (CGDBRA x)
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(Cvt32Fto32 ...) -> (CFEBRA ...)
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(Cvt32Fto64 ...) -> (CGEBRA ...)
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(Cvt64Fto32 ...) -> (CFDBRA ...)
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(Cvt64Fto64 ...) -> (CGDBRA ...)
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(Cvt32Fto64F x) -> (LDEBR x)
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(Cvt64Fto32F x) -> (LEDBR x)
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(Cvt32Fto64F ...) -> (LDEBR ...)
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(Cvt64Fto32F ...) -> (LEDBR ...)
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(Round(32|64)F x) -> (LoweredRound(32|64)F x)
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(Round(32|64)F ...) -> (LoweredRound(32|64)F ...)
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// Lowering shifts
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@ -280,8 +281,8 @@
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// Lowering rotates
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(RotateLeft8 <t> x (MOVDconst [c])) -> (Or8 (Lsh8x64 <t> x (MOVDconst [c&7])) (Rsh8Ux64 <t> x (MOVDconst [-c&7])))
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(RotateLeft16 <t> x (MOVDconst [c])) -> (Or16 (Lsh16x64 <t> x (MOVDconst [c&15])) (Rsh16Ux64 <t> x (MOVDconst [-c&15])))
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(RotateLeft32 x y) -> (RLL x y)
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(RotateLeft64 x y) -> (RLLG x y)
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(RotateLeft32 ...) -> (RLL ...)
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(RotateLeft64 ...) -> (RLLG ...)
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// Lowering comparisons
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(Less64 x y) -> (LOCGR {s390x.Less} (MOVDconst [0]) (MOVDconst [1]) (CMP x y))
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@ -423,26 +424,26 @@
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(LoweredZero [s%256] destptr (ADDconst <destptr.Type> destptr [(s/256)*256]) mem)
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// Lowering constants
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(Const(64|32|16|8) [val]) -> (MOVDconst [val])
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(Const(32|64)F [val]) -> (FMOV(S|D)const [val])
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(Const(64|32|16|8) ...) -> (MOVDconst ...)
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(Const(32|64)F ...) -> (FMOV(S|D)const ...)
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(ConstNil) -> (MOVDconst [0])
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(ConstBool [b]) -> (MOVDconst [b])
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(ConstBool ...) -> (MOVDconst ...)
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// Lowering calls
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(StaticCall [argwid] {target} mem) -> (CALLstatic [argwid] {target} mem)
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(ClosureCall [argwid] entry closure mem) -> (CALLclosure [argwid] entry closure mem)
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(InterCall [argwid] entry mem) -> (CALLinter [argwid] entry mem)
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(StaticCall ...) -> (CALLstatic ...)
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(ClosureCall ...) -> (CALLclosure ...)
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(InterCall ...) -> (CALLinter ...)
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// Miscellaneous
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(IsNonNil p) -> (LOCGR {s390x.NotEqual} (MOVDconst [0]) (MOVDconst [1]) (CMPconst p [0]))
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(IsInBounds idx len) -> (LOCGR {s390x.Less} (MOVDconst [0]) (MOVDconst [1]) (CMPU idx len))
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(IsSliceInBounds idx len) -> (LOCGR {s390x.LessOrEqual} (MOVDconst [0]) (MOVDconst [1]) (CMPU idx len))
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(NilCheck ptr mem) -> (LoweredNilCheck ptr mem)
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(GetG mem) -> (LoweredGetG mem)
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(GetClosurePtr) -> (LoweredGetClosurePtr)
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(GetCallerSP) -> (LoweredGetCallerSP)
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(GetCallerPC) -> (LoweredGetCallerPC)
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(Addr {sym} base) -> (MOVDaddr {sym} base)
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(NilCheck ...) -> (LoweredNilCheck ...)
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(GetG ...) -> (LoweredGetG ...)
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(GetClosurePtr ...) -> (LoweredGetClosurePtr ...)
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(GetCallerSP ...) -> (LoweredGetCallerSP ...)
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(GetCallerPC ...) -> (LoweredGetCallerPC ...)
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(Addr ...) -> (MOVDaddr ...)
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(LocalAddr {sym} base _) -> (MOVDaddr {sym} base)
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(ITab (Load ptr mem)) -> (MOVDload ptr mem)
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@ -450,7 +451,7 @@
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(If cond yes no) -> (CLIJ {s390x.LessOrGreater} (MOVBZreg <typ.Bool> cond) [0] yes no)
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// Write barrier.
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(WB {fn} destptr srcptr mem) -> (LoweredWB {fn} destptr srcptr mem)
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(WB ...) -> (LoweredWB ...)
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(PanicBounds [kind] x y mem) && boundsABI(kind) == 0 -> (LoweredPanicBoundsA [kind] x y mem)
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(PanicBounds [kind] x y mem) && boundsABI(kind) == 1 -> (LoweredPanicBoundsB [kind] x y mem)
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