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libmach: fix build on arm host
Fixes #1079. R=r, trufae, fgergo CC=golang-dev https://golang.org/cl/2103048
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@ -329,8 +329,8 @@ struct Instr
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uchar mod; /* bits 6-7 of mod r/m field */
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uchar mod; /* bits 6-7 of mod r/m field */
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uchar reg; /* bits 3-5 of mod r/m field */
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uchar reg; /* bits 3-5 of mod r/m field */
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char ss; /* bits 6-7 of SIB */
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char ss; /* bits 6-7 of SIB */
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char index; /* bits 3-5 of SIB */
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schar index; /* bits 3-5 of SIB */
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char base; /* bits 0-2 of SIB */
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schar base; /* bits 0-2 of SIB */
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char rip; /* RIP-relative in amd64 mode */
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char rip; /* RIP-relative in amd64 mode */
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uchar opre; /* f2/f3 could introduce media */
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uchar opre; /* f2/f3 could introduce media */
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short seg; /* segment of far address */
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short seg; /* segment of far address */
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@ -355,14 +355,15 @@ enum{
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DI,
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DI,
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/* amd64 */
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/* amd64 */
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R8,
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/* be careful: some unix system headers #define R8, R9, etc */
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R9,
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AMD64_R8,
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R10,
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AMD64_R9,
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R11,
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AMD64_R10,
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R12,
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AMD64_R11,
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R13,
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AMD64_R12,
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R14,
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AMD64_R13,
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R15
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AMD64_R14,
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AMD64_R15
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};
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};
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/* amd64 rex extension byte */
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/* amd64 rex extension byte */
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@ -416,8 +417,8 @@ enum {
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RMOPB, /* Byte R/M field with op code (/digit) */
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RMOPB, /* Byte R/M field with op code (/digit) */
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RMR, /* R/M register only (mod = 11) */
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RMR, /* R/M register only (mod = 11) */
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RMM, /* R/M memory only (mod = 0/1/2) */
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RMM, /* R/M memory only (mod = 0/1/2) */
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R0, /* Base reg of Mod R/M is literal 0x00 */
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Op_R0, /* Base reg of Mod R/M is literal 0x00 */
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R1, /* Base reg of Mod R/M is literal 0x01 */
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Op_R1, /* Base reg of Mod R/M is literal 0x01 */
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FRMOP, /* Floating point R/M field with opcode */
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FRMOP, /* Floating point R/M field with opcode */
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FRMEX, /* Extended floating point R/M field with opcode */
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FRMEX, /* Extended floating point R/M field with opcode */
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JUMP, /* Jump or Call flag - no operand */
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JUMP, /* Jump or Call flag - no operand */
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@ -1006,7 +1007,7 @@ static Optable optabDA[8+8] =
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[0x09] 0,0, "FCMOVEQ %f,F0",
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[0x09] 0,0, "FCMOVEQ %f,F0",
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[0x0a] 0,0, "FCMOVLS %f,F0",
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[0x0a] 0,0, "FCMOVLS %f,F0",
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[0x0b] 0,0, "FCMOVUN %f,F0",
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[0x0b] 0,0, "FCMOVUN %f,F0",
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[0x0d] R1,0, "FUCOMPP",
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[0x0d] Op_R1,0, "FUCOMPP",
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};
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};
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static Optable optabDB[8+64] =
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static Optable optabDB[8+64] =
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@ -1071,7 +1072,7 @@ static Optable optabDE[8+8] =
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[0x07] 0,0, "FDIVRW %e,F0",
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[0x07] 0,0, "FDIVRW %e,F0",
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[0x08] 0,0, "FADDDP F0,%f",
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[0x08] 0,0, "FADDDP F0,%f",
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[0x09] 0,0, "FMULDP F0,%f",
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[0x09] 0,0, "FMULDP F0,%f",
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[0x0b] R1,0, "FCOMPDP",
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[0x0b] Op_R1,0, "FCOMPDP",
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[0x0c] 0,0, "FSUBRDP F0,%f",
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[0x0c] 0,0, "FSUBRDP F0,%f",
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[0x0d] 0,0, "FSUBDP F0,%f",
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[0x0d] 0,0, "FSUBDP F0,%f",
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[0x0e] 0,0, "FDIVRDP F0,%f",
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[0x0e] 0,0, "FDIVRDP F0,%f",
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@ -1087,7 +1088,7 @@ static Optable optabDF[8+8] =
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[0x05] 0,0, "FMOVL %e,F0",
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[0x05] 0,0, "FMOVL %e,F0",
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[0x06] 0,0, "FBSTP %e",
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[0x06] 0,0, "FBSTP %e",
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[0x07] 0,0, "FMOVLP F0,%e",
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[0x07] 0,0, "FMOVLP F0,%e",
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[0x0c] R0,0, "FSTSW %OAX",
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[0x0c] Op_R0,0, "FSTSW %OAX",
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[0x0d] 0,0, "FUCOMIP F0,%f",
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[0x0d] 0,0, "FUCOMIP F0,%f",
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[0x0e] 0,0, "FCOMIP F0,%f",
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[0x0e] 0,0, "FCOMIP F0,%f",
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};
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};
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@ -1713,11 +1714,11 @@ badop:
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if (c != 0x0a)
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if (c != 0x0a)
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goto badop;
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goto badop;
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break;
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break;
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case R0: /* base register must be R0 */
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case Op_R0: /* base register must be R0 */
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if (ip->base != 0)
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if (ip->base != 0)
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goto badop;
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goto badop;
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break;
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break;
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case R1: /* base register must be R1 */
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case Op_R1: /* base register must be R1 */
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if (ip->base != 1)
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if (ip->base != 1)
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goto badop;
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goto badop;
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break;
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break;
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@ -1903,14 +1904,14 @@ static char *reg[] = {
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[DI] "DI",
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[DI] "DI",
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/* amd64 */
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/* amd64 */
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[R8] "R8",
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[AMD64_R8] "R8",
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[R9] "R9",
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[AMD64_R9] "R9",
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[R10] "R10",
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[AMD64_R10] "R10",
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[R11] "R11",
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[AMD64_R11] "R11",
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[R12] "R12",
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[AMD64_R12] "R12",
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[R13] "R13",
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[AMD64_R13] "R13",
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[R14] "R14",
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[AMD64_R14] "R14",
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[R15] "R15",
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[AMD64_R15] "R15",
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};
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};
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static char *breg[] = { "AL", "CL", "DL", "BL", "AH", "CH", "DH", "BH" };
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static char *breg[] = { "AL", "CL", "DL", "BL", "AH", "CH", "DH", "BH" };
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