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https://github.com/golang/go
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cmd/compile: add MOVBE index load/store
Fixes #51724 Change-Id: I94e650a7482dc4c479d597f0162a6a89d779708d Reviewed-on: https://go-review.googlesource.com/c/go/+/395474 Reviewed-by: Keith Randall <khr@golang.org> Trust: Cherry Mui <cherryyz@google.com>
This commit is contained in:
Wayne Zuo
Keith Randall
parent
615d3c3040
commit
32de2b0d1c
@ -786,7 +786,8 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p.To.Type = obj.TYPE_REG
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p.To.Reg = v.Reg()
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case ssa.OpAMD64MOVBloadidx1, ssa.OpAMD64MOVWloadidx1, ssa.OpAMD64MOVLloadidx1, ssa.OpAMD64MOVQloadidx1, ssa.OpAMD64MOVSSloadidx1, ssa.OpAMD64MOVSDloadidx1,
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ssa.OpAMD64MOVQloadidx8, ssa.OpAMD64MOVSDloadidx8, ssa.OpAMD64MOVLloadidx8, ssa.OpAMD64MOVLloadidx4, ssa.OpAMD64MOVSSloadidx4, ssa.OpAMD64MOVWloadidx2:
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ssa.OpAMD64MOVQloadidx8, ssa.OpAMD64MOVSDloadidx8, ssa.OpAMD64MOVLloadidx8, ssa.OpAMD64MOVLloadidx4, ssa.OpAMD64MOVSSloadidx4, ssa.OpAMD64MOVWloadidx2,
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ssa.OpAMD64MOVBELloadidx1, ssa.OpAMD64MOVBELloadidx4, ssa.OpAMD64MOVBELloadidx8, ssa.OpAMD64MOVBEQloadidx1, ssa.OpAMD64MOVBEQloadidx8:
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p := s.Prog(v.Op.Asm())
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memIdx(&p.From, v)
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ssagen.AddAux(&p.From, v)
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@ -808,7 +809,8 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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ssa.OpAMD64SUBLmodifyidx1, ssa.OpAMD64SUBLmodifyidx4, ssa.OpAMD64SUBLmodifyidx8, ssa.OpAMD64SUBQmodifyidx1, ssa.OpAMD64SUBQmodifyidx8,
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ssa.OpAMD64ANDLmodifyidx1, ssa.OpAMD64ANDLmodifyidx4, ssa.OpAMD64ANDLmodifyidx8, ssa.OpAMD64ANDQmodifyidx1, ssa.OpAMD64ANDQmodifyidx8,
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ssa.OpAMD64ORLmodifyidx1, ssa.OpAMD64ORLmodifyidx4, ssa.OpAMD64ORLmodifyidx8, ssa.OpAMD64ORQmodifyidx1, ssa.OpAMD64ORQmodifyidx8,
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ssa.OpAMD64XORLmodifyidx1, ssa.OpAMD64XORLmodifyidx4, ssa.OpAMD64XORLmodifyidx8, ssa.OpAMD64XORQmodifyidx1, ssa.OpAMD64XORQmodifyidx8:
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ssa.OpAMD64XORLmodifyidx1, ssa.OpAMD64XORLmodifyidx4, ssa.OpAMD64XORLmodifyidx8, ssa.OpAMD64XORQmodifyidx1, ssa.OpAMD64XORQmodifyidx8,
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ssa.OpAMD64MOVBEWstoreidx1, ssa.OpAMD64MOVBEWstoreidx2, ssa.OpAMD64MOVBELstoreidx1, ssa.OpAMD64MOVBELstoreidx4, ssa.OpAMD64MOVBELstoreidx8, ssa.OpAMD64MOVBEQstoreidx1, ssa.OpAMD64MOVBEQstoreidx8:
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p := s.Prog(v.Op.Asm())
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p.From.Type = obj.TYPE_REG
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p.From.Reg = v.Args[2].Reg()
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@ -356,6 +356,26 @@ var combine = map[[2]Op]Op{
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[2]Op{OpAMD64SHRXQload, OpAMD64LEAQ1}: OpAMD64SHRXQloadidx1,
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[2]Op{OpAMD64SHRXQload, OpAMD64LEAQ8}: OpAMD64SHRXQloadidx8,
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// amd64/v3
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[2]Op{OpAMD64MOVBELload, OpAMD64ADDQ}: OpAMD64MOVBELloadidx1,
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[2]Op{OpAMD64MOVBEQload, OpAMD64ADDQ}: OpAMD64MOVBEQloadidx1,
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[2]Op{OpAMD64MOVBELload, OpAMD64LEAQ1}: OpAMD64MOVBELloadidx1,
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[2]Op{OpAMD64MOVBELload, OpAMD64LEAQ4}: OpAMD64MOVBELloadidx4,
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[2]Op{OpAMD64MOVBELload, OpAMD64LEAQ8}: OpAMD64MOVBELloadidx8,
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[2]Op{OpAMD64MOVBEQload, OpAMD64LEAQ1}: OpAMD64MOVBEQloadidx1,
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[2]Op{OpAMD64MOVBEQload, OpAMD64LEAQ8}: OpAMD64MOVBEQloadidx8,
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[2]Op{OpAMD64MOVBEWstore, OpAMD64ADDQ}: OpAMD64MOVBEWstoreidx1,
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[2]Op{OpAMD64MOVBELstore, OpAMD64ADDQ}: OpAMD64MOVBELstoreidx1,
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[2]Op{OpAMD64MOVBEQstore, OpAMD64ADDQ}: OpAMD64MOVBEQstoreidx1,
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[2]Op{OpAMD64MOVBEWstore, OpAMD64LEAQ1}: OpAMD64MOVBEWstoreidx1,
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[2]Op{OpAMD64MOVBEWstore, OpAMD64LEAQ2}: OpAMD64MOVBEWstoreidx2,
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[2]Op{OpAMD64MOVBELstore, OpAMD64LEAQ1}: OpAMD64MOVBELstoreidx1,
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[2]Op{OpAMD64MOVBELstore, OpAMD64LEAQ4}: OpAMD64MOVBELstoreidx4,
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[2]Op{OpAMD64MOVBELstore, OpAMD64LEAQ8}: OpAMD64MOVBELstoreidx8,
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[2]Op{OpAMD64MOVBEQstore, OpAMD64LEAQ1}: OpAMD64MOVBEQstoreidx1,
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[2]Op{OpAMD64MOVBEQstore, OpAMD64LEAQ8}: OpAMD64MOVBEQstoreidx8,
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// 386
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[2]Op{Op386MOVBload, Op386ADDL}: Op386MOVBloadidx1,
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[2]Op{Op386MOVWload, Op386ADDL}: Op386MOVWloadidx1,
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@ -937,6 +937,20 @@ func init() {
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{name: "MOVBELstore", argLength: 3, reg: gpstore, asm: "MOVBEL", aux: "SymOff", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"}, // swap and store 4 bytes in arg1 to arg0+auxint+aux. arg2=mem
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{name: "MOVBEQload", argLength: 2, reg: gpload, asm: "MOVBEQ", aux: "SymOff", typ: "UInt64", faultOnNilArg0: true, symEffect: "Read"}, // load and swap 8 bytes from arg0+auxint+aux. arg1=mem
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{name: "MOVBEQstore", argLength: 3, reg: gpstore, asm: "MOVBEQ", aux: "SymOff", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"}, // swap and store 8 bytes in arg1 to arg0+auxint+aux. arg2=mem
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// indexed MOVBE loads
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{name: "MOVBELloadidx1", argLength: 3, reg: gploadidx, commutative: true, asm: "MOVBEL", scale: 1, aux: "SymOff", typ: "UInt32", symEffect: "Read"}, // load and swap 4 bytes from arg0+arg1+auxint+aux. arg2=mem. Zero extend.
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{name: "MOVBELloadidx4", argLength: 3, reg: gploadidx, asm: "MOVBEL", scale: 4, aux: "SymOff", typ: "UInt32", symEffect: "Read"}, // load and swap 4 bytes from arg0+4*arg1+auxint+aux. arg2=mem. Zero extend.
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{name: "MOVBELloadidx8", argLength: 3, reg: gploadidx, asm: "MOVBEL", scale: 8, aux: "SymOff", typ: "UInt32", symEffect: "Read"}, // load and swap 4 bytes from arg0+8*arg1+auxint+aux. arg2=mem. Zero extend.
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{name: "MOVBEQloadidx1", argLength: 3, reg: gploadidx, commutative: true, asm: "MOVBEQ", scale: 1, aux: "SymOff", typ: "UInt64", symEffect: "Read"}, // load and swap 8 bytes from arg0+arg1+auxint+aux. arg2=mem
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{name: "MOVBEQloadidx8", argLength: 3, reg: gploadidx, asm: "MOVBEQ", scale: 8, aux: "SymOff", typ: "UInt64", symEffect: "Read"}, // load and swap 8 bytes from arg0+8*arg1+auxint+aux. arg2=mem
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// indexed MOVBE stores
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{name: "MOVBEWstoreidx1", argLength: 4, reg: gpstoreidx, commutative: true, asm: "MOVBEW", scale: 1, aux: "SymOff", symEffect: "Write"}, // swap and store 2 bytes in arg2 to arg0+arg1+auxint+aux. arg3=mem
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{name: "MOVBEWstoreidx2", argLength: 4, reg: gpstoreidx, asm: "MOVBEW", scale: 2, aux: "SymOff", symEffect: "Write"}, // swap and store 2 bytes in arg2 to arg0+2*arg1+auxint+aux. arg3=mem
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{name: "MOVBELstoreidx1", argLength: 4, reg: gpstoreidx, commutative: true, asm: "MOVBEL", scale: 1, aux: "SymOff", symEffect: "Write"}, // swap and store 4 bytes in arg2 to arg0+arg1+auxint+aux. arg3=mem
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{name: "MOVBELstoreidx4", argLength: 4, reg: gpstoreidx, asm: "MOVBEL", scale: 4, aux: "SymOff", symEffect: "Write"}, // swap and store 4 bytes in arg2 to arg0+4*arg1+auxint+aux. arg3=mem
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{name: "MOVBELstoreidx8", argLength: 4, reg: gpstoreidx, asm: "MOVBEL", scale: 8, aux: "SymOff", symEffect: "Write"}, // swap and store 4 bytes in arg2 to arg0+8*arg1+auxint+aux. arg3=mem
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{name: "MOVBEQstoreidx1", argLength: 4, reg: gpstoreidx, commutative: true, asm: "MOVBEQ", scale: 1, aux: "SymOff", symEffect: "Write"}, // swap and store 8 bytes in arg2 to arg0+arg1+auxint+aux. arg3=mem
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{name: "MOVBEQstoreidx8", argLength: 4, reg: gpstoreidx, asm: "MOVBEQ", scale: 8, aux: "SymOff", symEffect: "Write"}, // swap and store 8 bytes in arg2 to arg0+8*arg1+auxint+aux. arg3=mem
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// CPUID feature: BMI2.
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{name: "SHLXLload", argLength: 3, reg: gp21shxload, asm: "SHLXL", aux: "SymOff", typ: "Uint32", faultOnNilArg0: true, symEffect: "Read"}, // *(arg0+auxint+aux) << arg1, arg2=mem, shift amount is mod 32
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@ -1050,6 +1050,18 @@ const (
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OpAMD64MOVBELstore
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OpAMD64MOVBEQload
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OpAMD64MOVBEQstore
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OpAMD64MOVBELloadidx1
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OpAMD64MOVBELloadidx4
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OpAMD64MOVBELloadidx8
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OpAMD64MOVBEQloadidx1
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OpAMD64MOVBEQloadidx8
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OpAMD64MOVBEWstoreidx1
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OpAMD64MOVBEWstoreidx2
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OpAMD64MOVBELstoreidx1
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OpAMD64MOVBELstoreidx4
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OpAMD64MOVBELstoreidx8
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OpAMD64MOVBEQstoreidx1
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OpAMD64MOVBEQstoreidx8
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OpAMD64SHLXLload
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OpAMD64SHLXQload
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OpAMD64SHRXLload
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@ -13910,6 +13922,201 @@ var opcodeTable = [...]opInfo{
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},
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},
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},
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{
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name: "MOVBELloadidx1",
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auxType: auxSymOff,
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argLen: 3,
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commutative: true,
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symEffect: SymRead,
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asm: x86.AMOVBEL,
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scale: 1,
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reg: regInfo{
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inputs: []inputInfo{
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{1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
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{0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
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},
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outputs: []outputInfo{
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{0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
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},
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},
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},
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{
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name: "MOVBELloadidx4",
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auxType: auxSymOff,
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argLen: 3,
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symEffect: SymRead,
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asm: x86.AMOVBEL,
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scale: 4,
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reg: regInfo{
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inputs: []inputInfo{
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{1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
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{0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
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},
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outputs: []outputInfo{
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{0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
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},
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},
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},
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{
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name: "MOVBELloadidx8",
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auxType: auxSymOff,
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argLen: 3,
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symEffect: SymRead,
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asm: x86.AMOVBEL,
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scale: 8,
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reg: regInfo{
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inputs: []inputInfo{
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{1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
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{0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
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},
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outputs: []outputInfo{
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{0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
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},
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},
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},
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{
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name: "MOVBEQloadidx1",
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auxType: auxSymOff,
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argLen: 3,
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commutative: true,
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symEffect: SymRead,
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asm: x86.AMOVBEQ,
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scale: 1,
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reg: regInfo{
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inputs: []inputInfo{
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{1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
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{0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
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},
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outputs: []outputInfo{
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{0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
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},
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},
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},
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{
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name: "MOVBEQloadidx8",
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auxType: auxSymOff,
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argLen: 3,
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symEffect: SymRead,
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asm: x86.AMOVBEQ,
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scale: 8,
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reg: regInfo{
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inputs: []inputInfo{
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{1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
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{0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
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},
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outputs: []outputInfo{
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{0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
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},
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},
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},
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{
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name: "MOVBEWstoreidx1",
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auxType: auxSymOff,
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argLen: 4,
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commutative: true,
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symEffect: SymWrite,
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asm: x86.AMOVBEW,
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scale: 1,
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reg: regInfo{
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inputs: []inputInfo{
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{1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
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{2, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
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{0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
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},
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},
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},
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{
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name: "MOVBEWstoreidx2",
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auxType: auxSymOff,
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argLen: 4,
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symEffect: SymWrite,
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asm: x86.AMOVBEW,
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scale: 2,
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reg: regInfo{
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inputs: []inputInfo{
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{1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
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{2, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
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{0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
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},
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},
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},
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{
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name: "MOVBELstoreidx1",
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auxType: auxSymOff,
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argLen: 4,
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commutative: true,
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symEffect: SymWrite,
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asm: x86.AMOVBEL,
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scale: 1,
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reg: regInfo{
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inputs: []inputInfo{
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{1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
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{2, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
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{0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
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},
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},
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},
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{
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name: "MOVBELstoreidx4",
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auxType: auxSymOff,
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argLen: 4,
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symEffect: SymWrite,
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asm: x86.AMOVBEL,
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scale: 4,
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reg: regInfo{
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inputs: []inputInfo{
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{1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
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{2, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
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{0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
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},
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},
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},
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{
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name: "MOVBELstoreidx8",
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auxType: auxSymOff,
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argLen: 4,
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symEffect: SymWrite,
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asm: x86.AMOVBEL,
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scale: 8,
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reg: regInfo{
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inputs: []inputInfo{
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{1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
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{2, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
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{0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
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},
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},
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},
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{
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name: "MOVBEQstoreidx1",
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auxType: auxSymOff,
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argLen: 4,
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commutative: true,
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symEffect: SymWrite,
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asm: x86.AMOVBEQ,
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scale: 1,
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reg: regInfo{
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inputs: []inputInfo{
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{1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
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{2, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
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{0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
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},
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},
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},
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{
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name: "MOVBEQstoreidx8",
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auxType: auxSymOff,
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argLen: 4,
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symEffect: SymWrite,
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asm: x86.AMOVBEQ,
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scale: 8,
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reg: regInfo{
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inputs: []inputInfo{
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{1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
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{2, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
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{0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
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},
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},
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},
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{
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name: "SHLXLload",
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auxType: auxSymOff,
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@ -76,7 +76,7 @@ func load_be64(b []byte) uint64 {
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func load_be64_idx(b []byte, idx int) uint64 {
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// amd64/v1,amd64/v2:`BSWAPQ`,-`MOV[BWL]\t[^$]`,-`OR`
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// amd64/v3: `MOVBEQ`
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// amd64/v3: `MOVBEQ\t\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*1\), [A-Z]+[0-9]*`
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// s390x:`MOVD\s\(.*\)\(.*\*1\),`
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// arm64:`REV`,`MOVD\s\(R[0-9]+\)\(R[0-9]+\),`,-`MOV[WHB]`,-`REVW`,-`REV16W`
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// ppc64le:`MOVDBR`,-`MOV[BHW]Z`
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@ -94,7 +94,7 @@ func load_be32(b []byte) uint32 {
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func load_be32_idx(b []byte, idx int) uint32 {
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// amd64/v1,amd64/v2:`BSWAPL`,-`MOV[BW]`,-`OR`
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// amd64/v3: `MOVBEL`
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// amd64/v3: `MOVBEL\t\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*1\), [A-Z]+[0-9]*`
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// s390x:`MOVWZ\s\(.*\)\(.*\*1\),`
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// arm64:`REVW`,`MOVWU\s\(R[0-9]+\)\(R[0-9]+\),`,-`MOV[HB]`,-`REV16W`
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// ppc64le:`MOVWBR`,-`MOV[BH]Z`
|
||||
@ -421,7 +421,7 @@ func store_be64(b []byte, x uint64) {
|
||||
|
||||
func store_be64_idx(b []byte, x uint64, idx int) {
|
||||
// amd64/v1,amd64/v2:`BSWAPQ`,-`SHR.`
|
||||
// amd64/v3:`MOVBEQ`
|
||||
// amd64/v3:`MOVBEQ\t[A-Z]+[0-9]*, \([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*1\)`
|
||||
// arm64:`REV`,`MOVD\sR[0-9]+,\s\(R[0-9]+\)\(R[0-9]+\)`,-`MOV[BHW]`,-`REV16W`,-`REVW`
|
||||
// ppc64le:`MOVDBR`
|
||||
// s390x:`MOVD\s.*\(.*\)\(.*\*1\)$`,-`SRW\s`,-`SRD\s`
|
||||
@ -451,7 +451,7 @@ func store_be32_load(b, x *[8]byte) {
|
||||
|
||||
func store_be32_idx(b []byte, x uint32, idx int) {
|
||||
// amd64/v1,amd64/v2:`BSWAPL`,-`SHR.`
|
||||
// amd64/v3:`MOVBEL`
|
||||
// amd64/v3:`MOVBEL\t[A-Z]+[0-9]*, \([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*1\)`
|
||||
// arm64:`REVW`,`MOVW\sR[0-9]+,\s\(R[0-9]+\)\(R[0-9]+\)`,-`MOV[BH]`,-`REV16W`
|
||||
// ppc64le:`MOVWBR`
|
||||
// s390x:`MOVW\s.*\(.*\)\(.*\*1\)$`,-`SRW\s`,-`SRD\s`
|
||||
@ -469,7 +469,7 @@ func store_be16(b []byte, x uint16) {
|
||||
|
||||
func store_be16_idx(b []byte, x uint16, idx int) {
|
||||
// amd64/v1,amd64/v2:`ROLW\s\$8`,-`SHR.`
|
||||
// amd64/v3: `MOVBEW`
|
||||
// amd64/v3:`MOVBEW\t[A-Z]+[0-9]*, \([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*1\)`
|
||||
// arm64:`MOVH\sR[0-9]+,\s\(R[0-9]+\)\(R[0-9]+\)`,`REV16W`,-`MOVB`
|
||||
// ppc64le:`MOVHBR`
|
||||
// s390x:`MOVH\s.*\(.*\)\(.*\*1\)$`,-`SRW\s`,-`SRD\s`
|
||||
|
||||
Loading…
Reference in New Issue
Block a user