qbit/go
1
0
Fork 0
mirror of https://github.com/golang/go synced 2024-11-17 13:04:54 -07:00
Code Releases Activity

cmd/compile: ignore div/mod in prove on non-x86 architectures

Browse Source 
Instead of writing AuxInt during prove and then zeroing it during lower,
just don't write it in the first place.

Passes toolstash-check -all.

Change-Id: Iea4b555029a9d69332e835536f9cf3a42b8223db
Reviewed-on: https://go-review.googlesource.com/c/go/+/220682
Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
This commit is contained in:
Josh Bleecher Snyder 2020-02-24 13:53:53 -08:00
parent 4ae1879dda
commit 2c859eae1d
11 changed files with 48 additions and 224 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
src/cmd/compile/internal/ssa/gen/ARM64.rules
View File

@ -18,9 +18,9 @@
(Hmul32u x y) -> (SRAconst (UMULL <typ.UInt64> x y) [32])
(Mul64uhilo ...) -> (LoweredMuluhilo ...)
(Div64 [a] x y) -> (DIV x y)
(Div64 ...) -> (DIV ...)
(Div64u ...) -> (UDIV ...)
(Div32 [a] x y) -> (DIVW x y)
(Div32 ...) -> (DIVW ...)
(Div32u ...) -> (UDIVW ...)
(Div16 x y) -> (DIVW (SignExt16to32 x) (SignExt16to32 y))
(Div16u x y) -> (UDIVW (ZeroExt16to32 x) (ZeroExt16to32 y))
@ -29,9 +29,9 @@
(Div32F ...) -> (FDIVS ...)
(Div64F ...) -> (FDIVD ...)
(Mod64 [a] x y) -> (MOD x y)
(Mod64 ...) -> (MOD ...)
(Mod64u ...) -> (UMOD ...)
(Mod32 [a] x y) -> (MODW x y)
(Mod32 ...) -> (MODW ...)
(Mod32u ...) -> (UMODW ...)
(Mod16 x y) -> (MODW (SignExt16to32 x) (SignExt16to32 y))
(Mod16u x y) -> (UMODW (ZeroExt16to32 x) (ZeroExt16to32 y))

4
src/cmd/compile/internal/ssa/gen/PPC64.rules
View File

@ -28,9 +28,9 @@
(Mul(32|16|8) ...) -> (MULLW ...)
(Mul64uhilo ...) -> (LoweredMuluhilo ...)
(Div64 [a] x y) -> (DIVD x y)
(Div64 ...) -> (DIVD ...)
(Div64u ...) -> (DIVDU ...)
(Div32 [a] x y) -> (DIVW x y)
(Div32 ...) -> (DIVW ...)
(Div32u ...) -> (DIVWU ...)
(Div16 x y) -> (DIVW (SignExt16to32 x) (SignExt16to32 y))
(Div16u x y) -> (DIVWU (ZeroExt16to32 x) (ZeroExt16to32 y))

8
src/cmd/compile/internal/ssa/gen/RISCV64.rules
View File

@ -43,9 +43,9 @@
(Div32F ...) -> (FDIVS ...)
(Div64F ...) -> (FDIVD ...)
(Div64 [a] x y) -> (DIV x y)
(Div64 ...) -> (DIV ...)
(Div64u ...) -> (DIVU ...)
(Div32 [a] x y) -> (DIVW x y)
(Div32 ...) -> (DIVW ...)
(Div32u ...) -> (DIVUW ...)
(Div16 x y) -> (DIVW (SignExt16to32 x) (SignExt16to32 y))
(Div16u x y) -> (DIVUW (ZeroExt16to32 x) (ZeroExt16to32 y))
@ -60,9 +60,9 @@
// (x + y) / 2 -> (x / 2) + (y / 2) + (x & y & 1)
(Avg64u <t> x y) -> (ADD (ADD <t> (SRLI <t> [1] x) (SRLI <t> [1] y)) (ANDI <t> [1] (AND <t> x y)))
(Mod64 [a] x y) -> (REM x y)
(Mod64 ...) -> (REM ...)
(Mod64u ...) -> (REMU ...)
(Mod32 [a] x y) -> (REMW x y)
(Mod32 ...) -> (REMW ...)
(Mod32u ...) -> (REMUW ...)
(Mod16 x y) -> (REMW (SignExt16to32 x) (SignExt16to32 y))
(Mod16u x y) -> (REMUW (ZeroExt16to32 x) (ZeroExt16to32 y))

4
src/cmd/compile/internal/ssa/gen/S390X.rules
View File

@ -22,7 +22,7 @@
(Div32F ...) -> (FDIVS ...)
(Div64F ...) -> (FDIV ...)
(Div64 [a] x y) -> (DIVD x y)
(Div64 ...) -> (DIVD ...)
(Div64u ...) -> (DIVDU ...)
// DIVW/DIVWU has a 64-bit dividend and a 32-bit divisor,
// so a sign/zero extension of the dividend is required.
@ -37,7 +37,7 @@
(Hmul32 x y) -> (SRDconst [32] (MULLD (MOVWreg x) (MOVWreg y)))
(Hmul32u x y) -> (SRDconst [32] (MULLD (MOVWZreg x) (MOVWZreg y)))
(Mod64 [a] x y) -> (MODD x y)
(Mod64 ...) -> (MODD ...)
(Mod64u ...) -> (MODDU ...)
// MODW/MODWU has a 64-bit dividend and a 32-bit divisor,
// so a sign/zero extension of the dividend is required.

4
src/cmd/compile/internal/ssa/gen/Wasm.rules
View File

@ -12,7 +12,7 @@
(Mul(64|32|16|8) ...) -> (I64Mul ...)
(Mul(64|32)F ...) -> (F(64|32)Mul ...)
(Div64 [a] x y) -> (I64DivS x y)
(Div64 ...) -> (I64DivS ...)
(Div64u ...) -> (I64DivU ...)
(Div32 x y) -> (I64DivS (SignExt32to64 x) (SignExt32to64 y))
(Div32u x y) -> (I64DivU (ZeroExt32to64 x) (ZeroExt32to64 y))
@ -22,7 +22,7 @@
(Div8u x y) -> (I64DivU (ZeroExt8to64 x) (ZeroExt8to64 y))
(Div(64|32)F ...) -> (F(64|32)Div ...)
(Mod64 [a] x y) -> (I64RemS x y)
(Mod64 ...) -> (I64RemS ...)
(Mod64u ...) -> (I64RemU ...)
(Mod32 x y) -> (I64RemS (SignExt32to64 x) (SignExt32to64 y))
(Mod32u x y) -> (I64RemU (ZeroExt32to64 x) (ZeroExt32to64 y))

6
src/cmd/compile/internal/ssa/prove.go
View File

@ -1219,6 +1219,12 @@ func simplifyBlock(sdom SparseTree, ft *factsTable, b *Block) {
case OpDiv16, OpDiv32, OpDiv64, OpMod16, OpMod32, OpMod64:
// On amd64 and 386 fix-up code can be avoided if we know
// the divisor is not -1 or the dividend > MinIntNN.
// Don't modify AuxInt on other architectures,
// as that can interfere with CSE.
// TODO: add other architectures?
if b.Func.Config.arch != "386" && b.Func.Config.arch != "amd64" {
break
}
divr := v.Args[1]
divrLim, divrLimok := ft.limits[divr.ID]
divd := v.Args[0]

68
src/cmd/compile/internal/ssa/rewriteARM64.go
View File

@ -609,7 +609,8 @@ func rewriteValueARM64(v *Value) bool {
case OpDiv16u:
return rewriteValueARM64_OpDiv16u(v)
case OpDiv32:
return rewriteValueARM64_OpDiv32(v)
v.Op = OpARM64DIVW
return true
case OpDiv32F:
v.Op = OpARM64FDIVS
return true
@ -617,7 +618,8 @@ func rewriteValueARM64(v *Value) bool {
v.Op = OpARM64UDIVW
return true
case OpDiv64:
return rewriteValueARM64_OpDiv64(v)
v.Op = OpARM64DIV
return true
case OpDiv64F:
v.Op = OpARM64FDIVD
return true
@ -766,12 +768,14 @@ func rewriteValueARM64(v *Value) bool {
case OpMod16u:
return rewriteValueARM64_OpMod16u(v)
case OpMod32:
return rewriteValueARM64_OpMod32(v)
v.Op = OpARM64MODW
return true
case OpMod32u:
v.Op = OpARM64UMODW
return true
case OpMod64:
return rewriteValueARM64_OpMod64(v)
v.Op = OpARM64MOD
return true
case OpMod64u:
v.Op = OpARM64UMOD
return true
@ -23150,34 +23154,6 @@ func rewriteValueARM64_OpDiv16u(v *Value) bool {
return true
}
}
func rewriteValueARM64_OpDiv32(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
// match: (Div32 [a] x y)
// result: (DIVW x y)
for {
x := v_0
y := v_1
v.reset(OpARM64DIVW)
v.AddArg(x)
v.AddArg(y)
return true
}
}
func rewriteValueARM64_OpDiv64(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
// match: (Div64 [a] x y)
// result: (DIV x y)
for {
x := v_0
y := v_1
v.reset(OpARM64DIV)
v.AddArg(x)
v.AddArg(y)
return true
}
}
func rewriteValueARM64_OpDiv8(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
@ -24604,34 +24580,6 @@ func rewriteValueARM64_OpMod16u(v *Value) bool {
return true
}
}
func rewriteValueARM64_OpMod32(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
// match: (Mod32 [a] x y)
// result: (MODW x y)
for {
x := v_0
y := v_1
v.reset(OpARM64MODW)
v.AddArg(x)
v.AddArg(y)
return true
}
}
func rewriteValueARM64_OpMod64(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
// match: (Mod64 [a] x y)
// result: (MOD x y)
for {
x := v_0
y := v_1
v.reset(OpARM64MOD)
v.AddArg(x)
v.AddArg(y)
return true
}
}
func rewriteValueARM64_OpMod8(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]

34
src/cmd/compile/internal/ssa/rewritePPC64.go
View File

@ -184,7 +184,8 @@ func rewriteValuePPC64(v *Value) bool {
case OpDiv16u:
return rewriteValuePPC64_OpDiv16u(v)
case OpDiv32:
return rewriteValuePPC64_OpDiv32(v)
v.Op = OpPPC64DIVW
return true
case OpDiv32F:
v.Op = OpPPC64FDIVS
return true
@ -192,7 +193,8 @@ func rewriteValuePPC64(v *Value) bool {
v.Op = OpPPC64DIVWU
return true
case OpDiv64:
return rewriteValuePPC64_OpDiv64(v)
v.Op = OpPPC64DIVD
return true
case OpDiv64F:
v.Op = OpPPC64FDIV
return true
@ -1446,34 +1448,6 @@ func rewriteValuePPC64_OpDiv16u(v *Value) bool {
return true
}
}
func rewriteValuePPC64_OpDiv32(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
// match: (Div32 [a] x y)
// result: (DIVW x y)
for {
x := v_0
y := v_1
v.reset(OpPPC64DIVW)
v.AddArg(x)
v.AddArg(y)
return true
}
}
func rewriteValuePPC64_OpDiv64(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
// match: (Div64 [a] x y)
// result: (DIVD x y)
for {
x := v_0
y := v_1
v.reset(OpPPC64DIVD)
v.AddArg(x)
v.AddArg(y)
return true
}
}
func rewriteValuePPC64_OpDiv8(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]

68
src/cmd/compile/internal/ssa/rewriteRISCV64.go
View File

@ -119,7 +119,8 @@ func rewriteValueRISCV64(v *Value) bool {
case OpDiv16u:
return rewriteValueRISCV64_OpDiv16u(v)
case OpDiv32:
return rewriteValueRISCV64_OpDiv32(v)
v.Op = OpRISCV64DIVW
return true
case OpDiv32F:
v.Op = OpRISCV64FDIVS
return true
@ -127,7 +128,8 @@ func rewriteValueRISCV64(v *Value) bool {
v.Op = OpRISCV64DIVUW
return true
case OpDiv64:
return rewriteValueRISCV64_OpDiv64(v)
v.Op = OpRISCV64DIV
return true
case OpDiv64F:
v.Op = OpRISCV64FDIVD
return true
@ -281,12 +283,14 @@ func rewriteValueRISCV64(v *Value) bool {
case OpMod16u:
return rewriteValueRISCV64_OpMod16u(v)
case OpMod32:
return rewriteValueRISCV64_OpMod32(v)
v.Op = OpRISCV64REMW
return true
case OpMod32u:
v.Op = OpRISCV64REMUW
return true
case OpMod64:
return rewriteValueRISCV64_OpMod64(v)
v.Op = OpRISCV64REM
return true
case OpMod64u:
v.Op = OpRISCV64REMU
return true
@ -724,34 +728,6 @@ func rewriteValueRISCV64_OpDiv16u(v *Value) bool {
return true
}
}
func rewriteValueRISCV64_OpDiv32(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
// match: (Div32 [a] x y)
// result: (DIVW x y)
for {
x := v_0
y := v_1
v.reset(OpRISCV64DIVW)
v.AddArg(x)
v.AddArg(y)
return true
}
}
func rewriteValueRISCV64_OpDiv64(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
// match: (Div64 [a] x y)
// result: (DIV x y)
for {
x := v_0
y := v_1
v.reset(OpRISCV64DIV)
v.AddArg(x)
v.AddArg(y)
return true
}
}
func rewriteValueRISCV64_OpDiv8(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
@ -1911,34 +1887,6 @@ func rewriteValueRISCV64_OpMod16u(v *Value) bool {
return true
}
}
func rewriteValueRISCV64_OpMod32(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
// match: (Mod32 [a] x y)
// result: (REMW x y)
for {
x := v_0
y := v_1
v.reset(OpRISCV64REMW)
v.AddArg(x)
v.AddArg(y)
return true
}
}
func rewriteValueRISCV64_OpMod64(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
// match: (Mod64 [a] x y)
// result: (REM x y)
for {
x := v_0
y := v_1
v.reset(OpRISCV64REM)
v.AddArg(x)
v.AddArg(y)
return true
}
}
func rewriteValueRISCV64_OpMod8(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]

34
src/cmd/compile/internal/ssa/rewriteS390X.go
View File

@ -195,7 +195,8 @@ func rewriteValueS390X(v *Value) bool {
case OpDiv32u:
return rewriteValueS390X_OpDiv32u(v)
case OpDiv64:
return rewriteValueS390X_OpDiv64(v)
v.Op = OpS390XDIVD
return true
case OpDiv64F:
v.Op = OpS390XFDIV
return true
@ -352,7 +353,8 @@ func rewriteValueS390X(v *Value) bool {
case OpMod32u:
return rewriteValueS390X_OpMod32u(v)
case OpMod64:
return rewriteValueS390X_OpMod64(v)
v.Op = OpS390XMODD
return true
case OpMod64u:
v.Op = OpS390XMODDU
return true
@ -1272,20 +1274,6 @@ func rewriteValueS390X_OpDiv32u(v *Value) bool {
return true
}
}
func rewriteValueS390X_OpDiv64(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
// match: (Div64 [a] x y)
// result: (DIVD x y)
for {
x := v_0
y := v_1
v.reset(OpS390XDIVD)
v.AddArg(x)
v.AddArg(y)
return true
}
}
func rewriteValueS390X_OpDiv8(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
@ -3252,20 +3240,6 @@ func rewriteValueS390X_OpMod32u(v *Value) bool {
return true
}
}
func rewriteValueS390X_OpMod64(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
// match: (Mod64 [a] x y)
// result: (MODD x y)
for {
x := v_0
y := v_1
v.reset(OpS390XMODD)
v.AddArg(x)
v.AddArg(y)
return true
}
}
func rewriteValueS390X_OpMod8(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]

34
src/cmd/compile/internal/ssa/rewriteWasm.go
View File

@ -181,7 +181,8 @@ func rewriteValueWasm(v *Value) bool {
case OpDiv32u:
return rewriteValueWasm_OpDiv32u(v)
case OpDiv64:
return rewriteValueWasm_OpDiv64(v)
v.Op = OpWasmI64DivS
return true
case OpDiv64F:
v.Op = OpWasmF64Div
return true
@ -344,7 +345,8 @@ func rewriteValueWasm(v *Value) bool {
case OpMod32u:
return rewriteValueWasm_OpMod32u(v)
case OpMod64:
return rewriteValueWasm_OpMod64(v)
v.Op = OpWasmI64RemS
return true
case OpMod64u:
v.Op = OpWasmI64RemU
return true
@ -954,20 +956,6 @@ func rewriteValueWasm_OpDiv32u(v *Value) bool {
return true
}
}
func rewriteValueWasm_OpDiv64(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
// match: (Div64 [a] x y)
// result: (I64DivS x y)
for {
x := v_0
y := v_1
v.reset(OpWasmI64DivS)
v.AddArg(x)
v.AddArg(y)
return true
}
}
func rewriteValueWasm_OpDiv8(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
@ -1871,20 +1859,6 @@ func rewriteValueWasm_OpMod32u(v *Value) bool {
return true
}
}
func rewriteValueWasm_OpMod64(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
// match: (Mod64 [a] x y)
// result: (I64RemS x y)
for {
x := v_0
y := v_1
v.reset(OpWasmI64RemS)
v.AddArg(x)
v.AddArg(y)
return true
}
}
func rewriteValueWasm_OpMod8(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]