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runtime,cmd/compile: change reg duff{zero,copy} for regabi riscv64

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As CL 356519 require, X8-X23 will be argument register, however X10, X11
is used by duff device.

This CL changes X10, X11 into X24, X25 to meet the prerequisite.

Update #40724

Change-Id: Ie9b899afbba7e9a51bb7dacd89e49ca1c1fc33ff
Reviewed-on: https://go-review.googlesource.com/c/go/+/357976
Trust: mzh <mzh@golangcn.org>
Run-TryBot: mzh <mzh@golangcn.org>
TryBot-Result: Gopher Robot <gobot@golang.org>
Reviewed-by: Joel Sing <joel@sing.id.au>
This commit is contained in:
Meng Zhuo 2021-10-22 17:40:08 +08:00 committed by mzh
parent 00535b8398
commit 29b968e766
5 changed files with 919 additions and 919 deletions
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2
src/cmd/compile/internal/riscv64/ggen.go
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@ -29,7 +29,7 @@ func zeroRange(pp *objw.Progs, p *obj.Prog, off, cnt int64, _ *uint32) *obj.Prog
} }
if cnt <= int64(128*types.PtrSize) { if cnt <= int64(128*types.PtrSize) {
p = pp.Append(p, riscv.AADDI, obj.TYPE_CONST, 0, off, obj.TYPE_REG, riscv.REG_A0, 0) p = pp.Append(p, riscv.AADDI, obj.TYPE_CONST, 0, off, obj.TYPE_REG, riscv.REG_X25, 0)
p.Reg = riscv.REG_SP p.Reg = riscv.REG_SP
p = pp.Append(p, obj.ADUFFZERO, obj.TYPE_NONE, 0, 0, obj.TYPE_MEM, 0, 0) p = pp.Append(p, obj.ADUFFZERO, obj.TYPE_NONE, 0, 0, obj.TYPE_MEM, 0, 0)
p.To.Name = obj.NAME_EXTERN p.To.Name = obj.NAME_EXTERN

14
src/cmd/compile/internal/ssa/gen/RISCV64Ops.go
View File

@ -247,7 +247,7 @@ func init() {
{name: "CALLinter", argLength: 2, reg: callInter, aux: "CallOff", call: true}, // call fn by pointer. arg0=codeptr, arg1=mem, auxint=argsize, returns mem {name: "CALLinter", argLength: 2, reg: callInter, aux: "CallOff", call: true}, // call fn by pointer. arg0=codeptr, arg1=mem, auxint=argsize, returns mem
// duffzero // duffzero
// arg0 = address of memory to zero (in X10, changed as side effect) // arg0 = address of memory to zero (in X25, changed as side effect)
// arg1 = mem // arg1 = mem
// auxint = offset into duffzero code to start executing // auxint = offset into duffzero code to start executing
// X1 (link register) changed because of function call // X1 (link register) changed because of function call
@ -257,16 +257,16 @@ func init() {
aux: "Int64", aux: "Int64",
argLength: 2, argLength: 2,
reg: regInfo{ reg: regInfo{
inputs: []regMask{regNamed["X10"]}, inputs: []regMask{regNamed["X25"]},
clobbers: regNamed["X1"] | regNamed["X10"], clobbers: regNamed["X1"] | regNamed["X25"],
}, },
typ: "Mem", typ: "Mem",
faultOnNilArg0: true, faultOnNilArg0: true,
}, },
// duffcopy // duffcopy
// arg0 = address of dst memory (in X11, changed as side effect) // arg0 = address of dst memory (in X25, changed as side effect)
// arg1 = address of src memory (in X10, changed as side effect) // arg1 = address of src memory (in X24, changed as side effect)
// arg2 = mem // arg2 = mem
// auxint = offset into duffcopy code to start executing // auxint = offset into duffcopy code to start executing
// X1 (link register) changed because of function call // X1 (link register) changed because of function call
@ -276,8 +276,8 @@ func init() {
aux: "Int64", aux: "Int64",
argLength: 3, argLength: 3,
reg: regInfo{ reg: regInfo{
inputs: []regMask{regNamed["X11"], regNamed["X10"]}, inputs: []regMask{regNamed["X25"], regNamed["X24"]},
clobbers: regNamed["X1"] | regNamed["X10"] | regNamed["X11"], clobbers: regNamed["X1"] | regNamed["X24"] | regNamed["X25"],
}, },
typ: "Mem", typ: "Mem",
faultOnNilArg0: true, faultOnNilArg0: true,

10
src/cmd/compile/internal/ssa/opGen.go
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@ -28923,9 +28923,9 @@ var opcodeTable = [...]opInfo{
faultOnNilArg0: true, faultOnNilArg0: true,
reg: regInfo{ reg: regInfo{
inputs: []inputInfo{ inputs: []inputInfo{
{0, 512}, // X10 {0, 16777216}, // X25
}, },
clobbers: 512, // X10 clobbers: 16777216, // X25
}, },
}, },
{ {
@ -28936,10 +28936,10 @@ var opcodeTable = [...]opInfo{
faultOnNilArg1: true, faultOnNilArg1: true,
reg: regInfo{ reg: regInfo{
inputs: []inputInfo{ inputs: []inputInfo{
{0, 1024}, // X11 {0, 16777216}, // X25
{1, 512}, // X10 {1, 8388608}, // X24
}, },
clobbers: 1536, // X10 X11 clobbers: 25165824, // X24 X25
}, },
}, },
{ {

1790
src/runtime/duff_riscv64.s
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File diff suppressed because it is too large Load Diff

22
src/runtime/mkduff.go
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@ -235,26 +235,26 @@ func copyMIPS64x(w io.Writer) {
func zeroRISCV64(w io.Writer) { func zeroRISCV64(w io.Writer) {
// ZERO: always zero // ZERO: always zero
// X10: ptr to memory to be zeroed // X25: ptr to memory to be zeroed
// X10 is updated as a side effect. // X25 is updated as a side effect.
fmt.Fprintln(w, "TEXT runtime·duffzero(SB), NOSPLIT|NOFRAME, $0-0") fmt.Fprintln(w, "TEXT runtime·duffzero(SB), NOSPLIT|NOFRAME, $0-0")
for i := 0; i < 128; i++ { for i := 0; i < 128; i++ {
fmt.Fprintln(w, "\tMOV\tZERO, (X10)") fmt.Fprintln(w, "\tMOV\tZERO, (X25)")
fmt.Fprintln(w, "\tADD\t$8, X10") fmt.Fprintln(w, "\tADD\t$8, X25")
} }
fmt.Fprintln(w, "\tRET") fmt.Fprintln(w, "\tRET")
} }
func copyRISCV64(w io.Writer) { func copyRISCV64(w io.Writer) {
// X10: ptr to source memory // X24: ptr to source memory
// X11: ptr to destination memory // X25: ptr to destination memory
// X10 and X11 are updated as a side effect // X24 and X25 are updated as a side effect
fmt.Fprintln(w, "TEXT runtime·duffcopy(SB), NOSPLIT|NOFRAME, $0-0") fmt.Fprintln(w, "TEXT runtime·duffcopy(SB), NOSPLIT|NOFRAME, $0-0")
for i := 0; i < 128; i++ { for i := 0; i < 128; i++ {
fmt.Fprintln(w, "\tMOV\t(X10), X31") fmt.Fprintln(w, "\tMOV\t(X24), X31")
fmt.Fprintln(w, "\tADD\t$8, X10") fmt.Fprintln(w, "\tADD\t$8, X24")
fmt.Fprintln(w, "\tMOV\tX31, (X11)") fmt.Fprintln(w, "\tMOV\tX31, (X25)")
fmt.Fprintln(w, "\tADD\t$8, X11") fmt.Fprintln(w, "\tADD\t$8, X25")
fmt.Fprintln(w) fmt.Fprintln(w)
} }
fmt.Fprintln(w, "\tRET") fmt.Fprintln(w, "\tRET")