diff --git a/src/cmd/compile/internal/riscv64/ssa.go b/src/cmd/compile/internal/riscv64/ssa.go
index b6e6dc1a03d..0ccd6cfe179 100644
--- a/src/cmd/compile/internal/riscv64/ssa.go
+++ b/src/cmd/compile/internal/riscv64/ssa.go
@@ -18,7 +18,7 @@ import (
 // ssaRegToReg maps ssa register numbers to obj register numbers.
 var ssaRegToReg = []int16{
 	riscv.REG_X0,
-	// X1 (LR): unused
+	// X1 (ra): unused
 	riscv.REG_X2,
 	riscv.REG_X3,
 	riscv.REG_X4,