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cmd/internal/obj/s390x: add atomic operation instructions
Adds the following s390x instructions from the interlocked access facility: * LAA(G) - load and add * LAAL(G) - load and add logical * LAN(G) - load and and * LAX(G) - load and exclusive or * LAO(G) - load and or These instructions can be used for atomic arithmetic/logical operations. The atomic packages will be updated in future CLs. Change-Id: Idc850ac6749b3e778fda3da66bcd864f6b1df375 Reviewed-on: https://go-review.googlesource.com/27871 Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
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11
src/cmd/asm/internal/asm/testdata/s390x.s
vendored
11
src/cmd/asm/internal/asm/testdata/s390x.s
vendored
@ -78,6 +78,17 @@ TEXT main·foo(SB),7,$16-0 // TEXT main.foo(SB), 7, $16-0
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DIVWU R1, R2 // b90400a0b90400b2b99700a1b904002b
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DIVWU R1, R2, R3 // b90400a0b90400b2b99700a1b904003b
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LAA R1, R2, 524287(R3) // eb213fff7ff8
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LAAG R4, R5, -524288(R6) // eb54600080e8
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LAAL R7, R8, 8192(R9) // eb87900002fa
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LAALG R10, R11, -8192(R12) // ebbac000feea
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LAN R1, R2, (R3) // eb21300000f4
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LANG R4, R5, (R6) // eb54600000e4
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LAX R7, R8, (R9) // eb87900000f7
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LAXG R10, R11, (R12) // ebbac00000e7
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LAO R1, R2, (R3) // eb21300000f6
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LAOG R4, R5, (R6) // eb54600000e6
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XC $8, (R15), n-8(SP) // XC (R15), $8, n-8(SP) // d707f010f000
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NC $8, (R15), n-8(SP) // NC (R15), $8, n-8(SP) // d407f010f000
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OC $8, (R15), n-8(SP) // OC (R15), $8, n-8(SP) // d607f010f000
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@ -364,6 +364,18 @@ const (
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ALA
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ALAY
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// interlocked load and op
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ALAA
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ALAAG
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ALAAL
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ALAALG
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ALAN
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ALANG
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ALAX
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ALAXG
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ALAO
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ALAOG
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// load/store multiple
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ALMY
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ALMG
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@ -134,6 +134,16 @@ var Anames = []string{
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"LARL",
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"LA",
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"LAY",
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"LAA",
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"LAAG",
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"LAAL",
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"LAALG",
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"LAN",
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"LANG",
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"LAX",
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"LAXG",
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"LAO",
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"LAOG",
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"LMY",
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"LMG",
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"STMY",
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@ -137,6 +137,9 @@ var optab = []Optab{
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Optab{AMOVBZ, C_ADDR, C_NONE, C_NONE, C_REG, 75, 0},
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Optab{AMOVB, C_ADDR, C_NONE, C_NONE, C_REG, 75, 0},
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// interlocked load and op
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Optab{ALAAG, C_REG, C_REG, C_NONE, C_LOREG, 99, 0},
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// integer arithmetic
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Optab{AADD, C_REG, C_REG, C_NONE, C_REG, 2, 0},
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Optab{AADD, C_REG, C_NONE, C_NONE, C_REG, 2, 0},
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@ -809,6 +812,16 @@ func buildop(ctxt *obj.Link) {
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opset(ASTCKC, r)
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opset(ASTCKE, r)
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opset(ASTCKF, r)
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case ALAAG:
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opset(ALAA, r)
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opset(ALAAL, r)
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opset(ALAALG, r)
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opset(ALAN, r)
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opset(ALANG, r)
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opset(ALAX, r)
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opset(ALAXG, r)
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opset(ALAO, r)
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opset(ALAOG, r)
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case ASTMG:
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opset(ASTMY, r)
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case ALMG:
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@ -3800,6 +3813,39 @@ func asmout(ctxt *obj.Link, asm *[]byte) {
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zRSY(op_LMG, uint32(rstart), uint32(rend), uint32(reg), uint32(offset), asm)
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}
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case 99: // interlocked load and op
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if p.To.Index != 0 {
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ctxt.Diag("cannot use indexed address")
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}
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offset := regoff(ctxt, &p.To)
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if offset < -DISP20/2 || offset >= DISP20/2 {
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ctxt.Diag("%v does not fit into 20-bit signed integer", offset)
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}
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var opcode uint32
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switch p.As {
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case ALAA:
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opcode = op_LAA
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case ALAAG:
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opcode = op_LAAG
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case ALAAL:
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opcode = op_LAAL
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case ALAALG:
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opcode = op_LAALG
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case ALAN:
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opcode = op_LAN
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case ALANG:
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opcode = op_LANG
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case ALAX:
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opcode = op_LAX
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case ALAXG:
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opcode = op_LAXG
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case ALAO:
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opcode = op_LAO
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case ALAOG:
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opcode = op_LAOG
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}
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zRSY(opcode, uint32(p.Reg), uint32(p.From.Reg), uint32(p.To.Reg), uint32(offset), asm)
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case 100: // VRX STORE
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op, m3, _ := vop(p.As)
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if p.From3 != nil {
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