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cmd/compile: fix an issue in MNEG of ARM64
There are two less optimized SSA rules in my previous CL https://go-review.googlesource.com/c/go/+/95075 . This CL fixes that issue and a test case gets about 10% performance improvement. name old time/op new time/op delta MNEG-4 263µs ± 3% 235µs ± 3% -10.53% (p=0.000 n=20+20) (https://github.com/benshi001/ugo1/blob/master/mneg_7_test.go) Change-Id: I30087097e281dd9d9d1c870d32e13b4ef4a96ad3 Reviewed-on: https://go-review.googlesource.com/99495 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
This commit is contained in:
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20046020c4
@ -862,9 +862,9 @@
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(MNEG x (MOVDconst [c])) && isPowerOfTwo(c) -> (NEG (SLLconst <x.Type> [log2(c)] x))
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(MNEG x (MOVDconst [c])) && isPowerOfTwo(c) -> (NEG (SLLconst <x.Type> [log2(c)] x))
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(MNEG x (MOVDconst [c])) && isPowerOfTwo(c-1) && c >= 3 -> (NEG (ADDshiftLL <x.Type> x x [log2(c-1)]))
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(MNEG x (MOVDconst [c])) && isPowerOfTwo(c-1) && c >= 3 -> (NEG (ADDshiftLL <x.Type> x x [log2(c-1)]))
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(MNEG x (MOVDconst [c])) && isPowerOfTwo(c+1) && c >= 7 -> (NEG (ADDshiftLL <x.Type> (NEG <x.Type> x) x [log2(c+1)]))
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(MNEG x (MOVDconst [c])) && isPowerOfTwo(c+1) && c >= 7 -> (NEG (ADDshiftLL <x.Type> (NEG <x.Type> x) x [log2(c+1)]))
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(MNEG x (MOVDconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) -> (NEG (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])))
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(MNEG x (MOVDconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) -> (SLLconst <x.Type> [log2(c/3)] (SUBshiftLL <x.Type> x x [2]))
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(MNEG x (MOVDconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) -> (NEG (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])))
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(MNEG x (MOVDconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) -> (NEG (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])))
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(MNEG x (MOVDconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) -> (NEG (SLLconst <x.Type> [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3])))
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(MNEG x (MOVDconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) -> (SLLconst <x.Type> [log2(c/7)] (SUBshiftLL <x.Type> x x [3]))
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(MNEG x (MOVDconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) -> (NEG (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])))
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(MNEG x (MOVDconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) -> (NEG (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])))
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(MNEGW x (MOVDconst [c])) && int32(c)==-1 -> x
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(MNEGW x (MOVDconst [c])) && int32(c)==-1 -> x
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@ -873,9 +873,9 @@
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(MNEGW x (MOVDconst [c])) && isPowerOfTwo(c) -> (NEG (SLLconst <x.Type> [log2(c)] x))
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(MNEGW x (MOVDconst [c])) && isPowerOfTwo(c) -> (NEG (SLLconst <x.Type> [log2(c)] x))
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(MNEGW x (MOVDconst [c])) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (NEG (ADDshiftLL <x.Type> x x [log2(c-1)]))
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(MNEGW x (MOVDconst [c])) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (NEG (ADDshiftLL <x.Type> x x [log2(c-1)]))
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(MNEGW x (MOVDconst [c])) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (NEG (ADDshiftLL <x.Type> (NEG <x.Type> x) x [log2(c+1)]))
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(MNEGW x (MOVDconst [c])) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (NEG (ADDshiftLL <x.Type> (NEG <x.Type> x) x [log2(c+1)]))
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(MNEGW x (MOVDconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (NEG (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])))
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(MNEGW x (MOVDconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (SLLconst <x.Type> [log2(c/3)] (SUBshiftLL <x.Type> x x [2]))
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(MNEGW x (MOVDconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (NEG (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])))
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(MNEGW x (MOVDconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (NEG (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])))
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(MNEGW x (MOVDconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (NEG (SLLconst <x.Type> [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3])))
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(MNEGW x (MOVDconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (SLLconst <x.Type> [log2(c/7)] (SUBshiftLL <x.Type> x x [3]))
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(MNEGW x (MOVDconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (NEG (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])))
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(MNEGW x (MOVDconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (NEG (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])))
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// div by constant
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// div by constant
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@ -4828,7 +4828,7 @@ func rewriteValueARM64_OpARM64MNEG_10(v *Value) bool {
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}
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}
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// match: (MNEG x (MOVDconst [c]))
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// match: (MNEG x (MOVDconst [c]))
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// cond: c%3 == 0 && isPowerOfTwo(c/3)
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// cond: c%3 == 0 && isPowerOfTwo(c/3)
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// result: (NEG (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])))
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// result: (SLLconst <x.Type> [log2(c/3)] (SUBshiftLL <x.Type> x x [2]))
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for {
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for {
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_ = v.Args[1]
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_ = v.Args[1]
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x := v.Args[0]
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x := v.Args[0]
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@ -4840,20 +4840,19 @@ func rewriteValueARM64_OpARM64MNEG_10(v *Value) bool {
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if !(c%3 == 0 && isPowerOfTwo(c/3)) {
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if !(c%3 == 0 && isPowerOfTwo(c/3)) {
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break
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break
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}
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}
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v.reset(OpARM64NEG)
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v.reset(OpARM64SLLconst)
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v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
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v.Type = x.Type
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v0.AuxInt = log2(c / 3)
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v.AuxInt = log2(c / 3)
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v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
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v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
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v1.AuxInt = 1
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v0.AuxInt = 2
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v1.AddArg(x)
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v0.AddArg(x)
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v1.AddArg(x)
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v0.AddArg(x)
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v0.AddArg(v1)
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v.AddArg(v0)
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v.AddArg(v0)
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return true
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return true
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}
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}
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// match: (MNEG (MOVDconst [c]) x)
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// match: (MNEG (MOVDconst [c]) x)
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// cond: c%3 == 0 && isPowerOfTwo(c/3)
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// cond: c%3 == 0 && isPowerOfTwo(c/3)
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// result: (NEG (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])))
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// result: (SLLconst <x.Type> [log2(c/3)] (SUBshiftLL <x.Type> x x [2]))
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for {
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for {
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_ = v.Args[1]
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_ = v.Args[1]
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v_0 := v.Args[0]
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v_0 := v.Args[0]
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@ -4865,14 +4864,13 @@ func rewriteValueARM64_OpARM64MNEG_10(v *Value) bool {
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if !(c%3 == 0 && isPowerOfTwo(c/3)) {
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if !(c%3 == 0 && isPowerOfTwo(c/3)) {
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break
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break
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}
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}
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v.reset(OpARM64NEG)
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v.reset(OpARM64SLLconst)
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v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
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v.Type = x.Type
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v0.AuxInt = log2(c / 3)
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v.AuxInt = log2(c / 3)
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v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
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v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
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v1.AuxInt = 1
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v0.AuxInt = 2
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v1.AddArg(x)
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v0.AddArg(x)
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v1.AddArg(x)
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v0.AddArg(x)
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v0.AddArg(v1)
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v.AddArg(v0)
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v.AddArg(v0)
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return true
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return true
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}
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}
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@ -4928,7 +4926,7 @@ func rewriteValueARM64_OpARM64MNEG_10(v *Value) bool {
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}
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}
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// match: (MNEG x (MOVDconst [c]))
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// match: (MNEG x (MOVDconst [c]))
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// cond: c%7 == 0 && isPowerOfTwo(c/7)
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// cond: c%7 == 0 && isPowerOfTwo(c/7)
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// result: (NEG (SLLconst <x.Type> [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3])))
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// result: (SLLconst <x.Type> [log2(c/7)] (SUBshiftLL <x.Type> x x [3]))
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for {
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for {
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_ = v.Args[1]
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_ = v.Args[1]
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x := v.Args[0]
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x := v.Args[0]
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@ -4940,22 +4938,19 @@ func rewriteValueARM64_OpARM64MNEG_10(v *Value) bool {
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if !(c%7 == 0 && isPowerOfTwo(c/7)) {
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if !(c%7 == 0 && isPowerOfTwo(c/7)) {
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break
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break
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}
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}
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v.reset(OpARM64NEG)
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v.reset(OpARM64SLLconst)
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v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
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v.Type = x.Type
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v0.AuxInt = log2(c / 7)
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v.AuxInt = log2(c / 7)
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v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
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v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
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v1.AuxInt = 3
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v0.AuxInt = 3
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v2 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
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v0.AddArg(x)
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v2.AddArg(x)
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v0.AddArg(x)
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v1.AddArg(v2)
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v1.AddArg(x)
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v0.AddArg(v1)
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v.AddArg(v0)
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v.AddArg(v0)
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return true
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return true
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}
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}
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// match: (MNEG (MOVDconst [c]) x)
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// match: (MNEG (MOVDconst [c]) x)
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// cond: c%7 == 0 && isPowerOfTwo(c/7)
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// cond: c%7 == 0 && isPowerOfTwo(c/7)
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// result: (NEG (SLLconst <x.Type> [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3])))
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// result: (SLLconst <x.Type> [log2(c/7)] (SUBshiftLL <x.Type> x x [3]))
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for {
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for {
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_ = v.Args[1]
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_ = v.Args[1]
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v_0 := v.Args[0]
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v_0 := v.Args[0]
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@ -4967,16 +4962,13 @@ func rewriteValueARM64_OpARM64MNEG_10(v *Value) bool {
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if !(c%7 == 0 && isPowerOfTwo(c/7)) {
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if !(c%7 == 0 && isPowerOfTwo(c/7)) {
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break
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break
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}
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}
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v.reset(OpARM64NEG)
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v.reset(OpARM64SLLconst)
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v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
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v.Type = x.Type
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v0.AuxInt = log2(c / 7)
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v.AuxInt = log2(c / 7)
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v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
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v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
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v1.AuxInt = 3
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v0.AuxInt = 3
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v2 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
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v0.AddArg(x)
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v2.AddArg(x)
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v0.AddArg(x)
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v1.AddArg(v2)
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v1.AddArg(x)
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v0.AddArg(v1)
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v.AddArg(v0)
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v.AddArg(v0)
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return true
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return true
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}
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}
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@ -5325,7 +5317,7 @@ func rewriteValueARM64_OpARM64MNEGW_10(v *Value) bool {
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}
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}
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// match: (MNEGW x (MOVDconst [c]))
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// match: (MNEGW x (MOVDconst [c]))
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// cond: c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)
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// cond: c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)
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// result: (NEG (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])))
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// result: (SLLconst <x.Type> [log2(c/3)] (SUBshiftLL <x.Type> x x [2]))
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for {
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for {
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_ = v.Args[1]
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_ = v.Args[1]
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x := v.Args[0]
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x := v.Args[0]
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@ -5337,20 +5329,19 @@ func rewriteValueARM64_OpARM64MNEGW_10(v *Value) bool {
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if !(c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)) {
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if !(c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)) {
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break
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break
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}
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}
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v.reset(OpARM64NEG)
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v.reset(OpARM64SLLconst)
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v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
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v.Type = x.Type
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v0.AuxInt = log2(c / 3)
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v.AuxInt = log2(c / 3)
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v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
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v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
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v1.AuxInt = 1
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v0.AuxInt = 2
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v1.AddArg(x)
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v0.AddArg(x)
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v1.AddArg(x)
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v0.AddArg(x)
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v0.AddArg(v1)
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v.AddArg(v0)
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v.AddArg(v0)
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return true
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return true
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}
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}
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// match: (MNEGW (MOVDconst [c]) x)
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// match: (MNEGW (MOVDconst [c]) x)
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// cond: c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)
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// cond: c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)
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// result: (NEG (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])))
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// result: (SLLconst <x.Type> [log2(c/3)] (SUBshiftLL <x.Type> x x [2]))
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for {
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for {
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_ = v.Args[1]
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_ = v.Args[1]
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v_0 := v.Args[0]
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v_0 := v.Args[0]
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@ -5362,14 +5353,13 @@ func rewriteValueARM64_OpARM64MNEGW_10(v *Value) bool {
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if !(c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)) {
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if !(c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)) {
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break
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break
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}
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}
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v.reset(OpARM64NEG)
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v.reset(OpARM64SLLconst)
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v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
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v.Type = x.Type
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v0.AuxInt = log2(c / 3)
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v.AuxInt = log2(c / 3)
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v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
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v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
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v1.AuxInt = 1
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v0.AuxInt = 2
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v1.AddArg(x)
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v0.AddArg(x)
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v1.AddArg(x)
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v0.AddArg(x)
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v0.AddArg(v1)
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v.AddArg(v0)
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v.AddArg(v0)
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return true
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return true
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}
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}
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@ -5425,7 +5415,7 @@ func rewriteValueARM64_OpARM64MNEGW_10(v *Value) bool {
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}
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}
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// match: (MNEGW x (MOVDconst [c]))
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// match: (MNEGW x (MOVDconst [c]))
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// cond: c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)
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// cond: c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)
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// result: (NEG (SLLconst <x.Type> [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3])))
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// result: (SLLconst <x.Type> [log2(c/7)] (SUBshiftLL <x.Type> x x [3]))
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for {
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for {
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_ = v.Args[1]
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_ = v.Args[1]
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x := v.Args[0]
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x := v.Args[0]
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@ -5437,22 +5427,19 @@ func rewriteValueARM64_OpARM64MNEGW_10(v *Value) bool {
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if !(c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)) {
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if !(c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)) {
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break
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break
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}
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}
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v.reset(OpARM64NEG)
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v.reset(OpARM64SLLconst)
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v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
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v.Type = x.Type
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v0.AuxInt = log2(c / 7)
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v.AuxInt = log2(c / 7)
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v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
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v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
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v1.AuxInt = 3
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v0.AuxInt = 3
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v2 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
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v0.AddArg(x)
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v2.AddArg(x)
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v0.AddArg(x)
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v1.AddArg(v2)
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v1.AddArg(x)
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v0.AddArg(v1)
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|
||||||
v.AddArg(v0)
|
v.AddArg(v0)
|
||||||
return true
|
return true
|
||||||
}
|
}
|
||||||
// match: (MNEGW (MOVDconst [c]) x)
|
// match: (MNEGW (MOVDconst [c]) x)
|
||||||
// cond: c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)
|
// cond: c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)
|
||||||
// result: (NEG (SLLconst <x.Type> [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3])))
|
// result: (SLLconst <x.Type> [log2(c/7)] (SUBshiftLL <x.Type> x x [3]))
|
||||||
for {
|
for {
|
||||||
_ = v.Args[1]
|
_ = v.Args[1]
|
||||||
v_0 := v.Args[0]
|
v_0 := v.Args[0]
|
||||||
@ -5464,16 +5451,13 @@ func rewriteValueARM64_OpARM64MNEGW_10(v *Value) bool {
|
|||||||
if !(c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)) {
|
if !(c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)) {
|
||||||
break
|
break
|
||||||
}
|
}
|
||||||
v.reset(OpARM64NEG)
|
v.reset(OpARM64SLLconst)
|
||||||
v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
|
v.Type = x.Type
|
||||||
v0.AuxInt = log2(c / 7)
|
v.AuxInt = log2(c / 7)
|
||||||
v1 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
|
v0 := b.NewValue0(v.Pos, OpARM64SUBshiftLL, x.Type)
|
||||||
v1.AuxInt = 3
|
v0.AuxInt = 3
|
||||||
v2 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
|
v0.AddArg(x)
|
||||||
v2.AddArg(x)
|
v0.AddArg(x)
|
||||||
v1.AddArg(v2)
|
|
||||||
v1.AddArg(x)
|
|
||||||
v0.AddArg(v1)
|
|
||||||
v.AddArg(v0)
|
v.AddArg(v0)
|
||||||
return true
|
return true
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user