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cmd/compile/internal: add ABI register information for riscv64

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This CL adds the defines for ABI registers on riscv64.

Updates #40724

Change-Id: I53a89d88b6feb1a88cf7008b8484d444791e8a55
Reviewed-on: https://go-review.googlesource.com/c/go/+/356519
Trust: mzh <mzh@golangcn.org>
Run-TryBot: mzh <mzh@golangcn.org>
Reviewed-by: Joel Sing <joel@sing.id.au>
Reviewed-by: Cherry Mui <cherryyz@google.com>
TryBot-Result: Gopher Robot <gobot@golang.org>
This commit is contained in:
Meng Zhuo 2021-10-19 10:22:20 +08:00 committed by mzh
parent 20d333b6f4
commit 1045faa38c
1 changed files with 51 additions and 0 deletions
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src/cmd/compile/abi-internal.md
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@ -730,6 +730,57 @@ The floating point status and control register (FPSCR) is initialized
to 0 by the kernel at startup of the Go program and not changed by
the Go generated code.
### riscv64 architecture
The riscv64 architecture uses X10 – X17, X8, X9, X18 – X23 for integer arguments
and results.
It uses F10 – F17, F8, F9, F18 – F23 for floating-point arguments and results.
Special-purpose registers used within Go generated code and Go
assembly code are as follows:
| Register | Call meaning | Return meaning | Body meaning |
| --- | --- | --- | --- |
| X0 | Zero value | Same | Same |
| X1 | Link register | Link register | Scratch |
| X2 | Stack pointer | Same | Same |
| X3 | Global pointer | Same | Used by dynamic linker |
| X4 | TLS (thread pointer) | TLS | Scratch |
| X24,X25 | Scratch | Scratch | Used by duffcopy, duffzero |
| X26 | Closure context pointer | Scratch | Scratch |
| X27 | Current goroutine | Same | Same |
| X31 | Scratch | Scratch | Scratch |
*Rationale*: These register meanings are compatible with Go’s
stack-based calling convention. Context register X20 will change to X26,
duffcopy, duffzero register will change to X24, X25 before this register ABI been adopted.
X10 – X17, X8, X9, X18 – X23, is the same order as A0 – A7, S0 – S7 in platform ABI.
F10 – F17, F8, F9, F18 – F23, is the same order as FA0 – FA7, FS0 – FS7 in platform ABI.
X8 – X23, F8 – F15 are used for compressed instruction (RVC) which will benefit code size in the future.
#### Stack layout
The stack pointer, X2, grows down and is aligned to 8 bytes.
A function's stack frame, after the frame is created, is laid out as
follows:
+------------------------------+
| ... locals ... |
| ... outgoing arguments ... |
| return PC | ← X2 points to
+------------------------------+ ↓ lower addresses
The "return PC" is loaded to the link register, X1, as part of the
riscv64 `CALL` operation.
#### Flags
The riscv64 has Zicsr extension for control and status register (CSR) and
treated as scratch register.
All bits in CSR are system flags and are not modified by Go.
## Future directions
### Spill path improvements