From 0eacf8cbdfaec174f29fd8c734ac2f02442af79a Mon Sep 17 00:00:00 2001 From: David Chase Date: Wed, 7 Mar 2018 16:21:47 -0500 Subject: [PATCH] cmd/compile: add DWARF reg defs & fix 32-bit location list bug Before DWARF location lists can be turned on, 3 bugs need fixing. This CL addresses two -- lack of register definitions for various architectures, and bugs on 32-bit platforms. The third bug comes later. Passes GO_GCFLAGS=-dwarflocationlists ./run.bash -no-rebuild (-no-rebuild because the map dependence causes trouble) Change-Id: I4223b48ade84763e4b048e4aeb81149f082c7bc7 Reviewed-on: https://go-review.googlesource.com/99255 Run-TryBot: David Chase TryBot-Result: Gobot Gobot Reviewed-by: Cherry Zhang --- src/cmd/compile/internal/ssa/debug.go | 2 +- src/cmd/internal/obj/arm/a.out.go | 14 +++++++++ src/cmd/internal/obj/arm/obj5.go | 13 ++++---- src/cmd/internal/obj/mips/a.out.go | 18 +++++++++++ src/cmd/internal/obj/mips/obj0.go | 44 +++++++++++++++------------ src/cmd/internal/obj/ppc64/a.out.go | 23 ++++++++++++++ src/cmd/internal/obj/ppc64/obj9.go | 22 ++++++++------ src/cmd/internal/obj/s390x/a.out.go | 26 ++++++++++++++++ src/cmd/internal/obj/s390x/objz.go | 13 ++++---- 9 files changed, 132 insertions(+), 43 deletions(-) diff --git a/src/cmd/compile/internal/ssa/debug.go b/src/cmd/compile/internal/ssa/debug.go index 3924f9341a..1e03ce2964 100644 --- a/src/cmd/compile/internal/ssa/debug.go +++ b/src/cmd/compile/internal/ssa/debug.go @@ -1001,7 +1001,7 @@ func decodeValue(ctxt *obj.Link, word uint64) (ID, ID) { if ctxt.Arch.PtrSize != 4 { panic("unexpected pointer size") } - return ID(word >> 16), ID(word) + return ID(word >> 16), ID(int16(word)) } // Append a pointer-sized uint to buf. diff --git a/src/cmd/internal/obj/arm/a.out.go b/src/cmd/internal/obj/arm/a.out.go index d4d9510230..358f329b4f 100644 --- a/src/cmd/internal/obj/arm/a.out.go +++ b/src/cmd/internal/obj/arm/a.out.go @@ -110,6 +110,20 @@ const ( FREGTMP = REG_F15 ) +// http://infocenter.arm.com/help/topic/com.arm.doc.ihi0040b/IHI0040B_aadwarf.pdf +var ARMDWARFRegisters = map[int16]int16{} + +func init() { + // f assigns dwarfregisters[from:to] = (base):(step*(to-from)+base) + f := func(from, to, base, step int16) { + for r := int16(from); r <= to; r++ { + ARMDWARFRegisters[r] = step*(r-from) + base + } + } + f(REG_R0, REG_R15, 0, 1) + f(REG_F0, REG_F15, 64, 2) // Use d0 through D15, aka S0, S2, ..., S30 +} + const ( C_NONE = iota C_REG diff --git a/src/cmd/internal/obj/arm/obj5.go b/src/cmd/internal/obj/arm/obj5.go index 2046649e38..82ca301205 100644 --- a/src/cmd/internal/obj/arm/obj5.go +++ b/src/cmd/internal/obj/arm/obj5.go @@ -885,10 +885,11 @@ var unaryDst = map[obj.As]bool{ } var Linkarm = obj.LinkArch{ - Arch: sys.ArchARM, - Init: buildop, - Preprocess: preprocess, - Assemble: span5, - Progedit: progedit, - UnaryDst: unaryDst, + Arch: sys.ArchARM, + Init: buildop, + Preprocess: preprocess, + Assemble: span5, + Progedit: progedit, + UnaryDst: unaryDst, + DWARFRegisters: ARMDWARFRegisters, } diff --git a/src/cmd/internal/obj/mips/a.out.go b/src/cmd/internal/obj/mips/a.out.go index 49ceac1028..d2ae2f8c0b 100644 --- a/src/cmd/internal/obj/mips/a.out.go +++ b/src/cmd/internal/obj/mips/a.out.go @@ -201,6 +201,24 @@ const ( FREGRET = REG_F0 ) +// https://llvm.org/svn/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td search for DwarfRegNum +// https://gcc.gnu.org/viewcvs/gcc/trunk/gcc/config/mips/mips.c?view=co&revision=258099&content-type=text%2Fplain search for mips_dwarf_regno +// For now, this is adequate for both 32 and 64 bit. +var MIPSDWARFRegisters = map[int16]int16{} + +func init() { + // f assigns dwarfregisters[from:to] = (base):(to-from+base) + f := func(from, to, base int16) { + for r := int16(from); r <= to; r++ { + MIPSDWARFRegisters[r] = (r - from) + base + } + } + f(REG_R0, REG_R31, 0) + f(REG_F0, REG_F31, 32) // For 32-bit MIPS, compiler only uses even numbered registers -- see cmd/compile/internal/ssa/gen/MIPSOps.go + MIPSDWARFRegisters[REG_HI] = 64 + MIPSDWARFRegisters[REG_LO] = 65 +} + const ( BIG = 32766 ) diff --git a/src/cmd/internal/obj/mips/obj0.go b/src/cmd/internal/obj/mips/obj0.go index 2b9f18c942..aa40851738 100644 --- a/src/cmd/internal/obj/mips/obj0.go +++ b/src/cmd/internal/obj/mips/obj0.go @@ -1411,33 +1411,37 @@ func (c *ctxt0) compound(p *obj.Prog) bool { } var Linkmips64 = obj.LinkArch{ - Arch: sys.ArchMIPS64, - Init: buildop, - Preprocess: preprocess, - Assemble: span0, - Progedit: progedit, + Arch: sys.ArchMIPS64, + Init: buildop, + Preprocess: preprocess, + Assemble: span0, + Progedit: progedit, + DWARFRegisters: MIPSDWARFRegisters, } var Linkmips64le = obj.LinkArch{ - Arch: sys.ArchMIPS64LE, - Init: buildop, - Preprocess: preprocess, - Assemble: span0, - Progedit: progedit, + Arch: sys.ArchMIPS64LE, + Init: buildop, + Preprocess: preprocess, + Assemble: span0, + Progedit: progedit, + DWARFRegisters: MIPSDWARFRegisters, } var Linkmips = obj.LinkArch{ - Arch: sys.ArchMIPS, - Init: buildop, - Preprocess: preprocess, - Assemble: span0, - Progedit: progedit, + Arch: sys.ArchMIPS, + Init: buildop, + Preprocess: preprocess, + Assemble: span0, + Progedit: progedit, + DWARFRegisters: MIPSDWARFRegisters, } var Linkmipsle = obj.LinkArch{ - Arch: sys.ArchMIPSLE, - Init: buildop, - Preprocess: preprocess, - Assemble: span0, - Progedit: progedit, + Arch: sys.ArchMIPSLE, + Init: buildop, + Preprocess: preprocess, + Assemble: span0, + Progedit: progedit, + DWARFRegisters: MIPSDWARFRegisters, } diff --git a/src/cmd/internal/obj/ppc64/a.out.go b/src/cmd/internal/obj/ppc64/a.out.go index 87577159d5..16a959d62a 100644 --- a/src/cmd/internal/obj/ppc64/a.out.go +++ b/src/cmd/internal/obj/ppc64/a.out.go @@ -255,6 +255,29 @@ const ( FREGEXT = REG_F26 /* first external register */ ) +// OpenPOWER ABI for Linux Supplement Power Architecture 64-Bit ELF V2 ABI +// https://openpowerfoundation.org/?resource_lib=64-bit-elf-v2-abi-specification-power-architecture +var PPC64DWARFRegisters = map[int16]int16{} + +func init() { + // f assigns dwarfregister[from:to] = (base):(to-from+base) + f := func(from, to, base int16) { + for r := int16(from); r <= to; r++ { + PPC64DWARFRegisters[r] = r - from + base + } + } + f(REG_R0, REG_R31, 0) + f(REG_F0, REG_F31, 32) + f(REG_V0, REG_V31, 77) + f(REG_CR0, REG_CR7, 68) + + f(REG_VS0, REG_VS31, 32) // overlaps F0-F31 + f(REG_VS32, REG_VS63, 77) // overlaps V0-V31 + PPC64DWARFRegisters[REG_LR] = 65 + PPC64DWARFRegisters[REG_CTR] = 66 + PPC64DWARFRegisters[REG_XER] = 76 +} + /* * GENERAL: * diff --git a/src/cmd/internal/obj/ppc64/obj9.go b/src/cmd/internal/obj/ppc64/obj9.go index c468ee93a4..4982a85fdb 100644 --- a/src/cmd/internal/obj/ppc64/obj9.go +++ b/src/cmd/internal/obj/ppc64/obj9.go @@ -1056,17 +1056,19 @@ func (c *ctxt9) stacksplit(p *obj.Prog, framesize int32) *obj.Prog { } var Linkppc64 = obj.LinkArch{ - Arch: sys.ArchPPC64, - Init: buildop, - Preprocess: preprocess, - Assemble: span9, - Progedit: progedit, + Arch: sys.ArchPPC64, + Init: buildop, + Preprocess: preprocess, + Assemble: span9, + Progedit: progedit, + DWARFRegisters: PPC64DWARFRegisters, } var Linkppc64le = obj.LinkArch{ - Arch: sys.ArchPPC64LE, - Init: buildop, - Preprocess: preprocess, - Assemble: span9, - Progedit: progedit, + Arch: sys.ArchPPC64LE, + Init: buildop, + Preprocess: preprocess, + Assemble: span9, + Progedit: progedit, + DWARFRegisters: PPC64DWARFRegisters, } diff --git a/src/cmd/internal/obj/s390x/a.out.go b/src/cmd/internal/obj/s390x/a.out.go index 54c1edb4b0..a51685e22b 100644 --- a/src/cmd/internal/obj/s390x/a.out.go +++ b/src/cmd/internal/obj/s390x/a.out.go @@ -149,6 +149,32 @@ const ( REGSP = REG_R15 // stack pointer ) +// LINUX for zSeries ELF Application Binary Interface Supplement +// http://refspecs.linuxfoundation.org/ELF/zSeries/lzsabi0_zSeries/x1472.html +var S390XDWARFRegisters = map[int16]int16{} + +func init() { + // f assigns dwarfregisters[from:to by step] = (base):((to-from)/step+base) + f := func(from, step, to, base int16) { + for r := int16(from); r <= to; r += step { + S390XDWARFRegisters[r] = (r-from)/step + base + } + } + f(REG_R0, 1, REG_R15, 0) + + f(REG_F0, 2, REG_F6, 16) + f(REG_F1, 2, REG_F7, 20) + f(REG_F8, 2, REG_F14, 24) + f(REG_F9, 2, REG_F15, 28) + + f(REG_V0, 2, REG_V6, 16) // V0:15 aliased to F0:15 + f(REG_V1, 2, REG_V7, 20) // TODO what about V16:31? + f(REG_V8, 2, REG_V14, 24) + f(REG_V9, 2, REG_V15, 28) + + f(REG_AR0, 1, REG_AR15, 48) +} + const ( BIG = 32768 - 8 DISP12 = 4096 diff --git a/src/cmd/internal/obj/s390x/objz.go b/src/cmd/internal/obj/s390x/objz.go index 45ce68bebf..05d31d1ffd 100644 --- a/src/cmd/internal/obj/s390x/objz.go +++ b/src/cmd/internal/obj/s390x/objz.go @@ -720,10 +720,11 @@ var unaryDst = map[obj.As]bool{ } var Links390x = obj.LinkArch{ - Arch: sys.ArchS390X, - Init: buildop, - Preprocess: preprocess, - Assemble: spanz, - Progedit: progedit, - UnaryDst: unaryDst, + Arch: sys.ArchS390X, + Init: buildop, + Preprocess: preprocess, + Assemble: spanz, + Progedit: progedit, + UnaryDst: unaryDst, + DWARFRegisters: S390XDWARFRegisters, }