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cmd/internal/obj/arm: support more ARM VFP instructions

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Add support of more ARM VFP instructions in the assembler.
They were introduced in ARM VFPv2.

"NMULF/NMULD   Fm, Fn, Fd": Fd = -Fn*Fm
"MULAF/MULAD   Fm, Fn, Fd": Fd = Fd + Fn*Fm
"NMULAF/NMULAD Fm, Fn, Fd": Fd = -(Fd + Fn*Fm)
"MULSF/MULSD   Fm, Fn, Fd": Fd = Fd - Fn*Fm
"NMULSF/NMULSD Fm, Fn, Fd": Fd = -(Fd - Fn*Fm)

Change-Id: Icd302676ca44a9f5f153fce734225299403c4163
Reviewed-on: https://go-review.googlesource.com/60170
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
This commit is contained in:
Ben Shi 2017-08-30 08:20:43 +00:00 committed by Cherry Zhang
parent f7cb5bca1a
commit 074547a5ce
5 changed files with 76 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
src/cmd/asm/internal/asm/testdata/armerror.s vendored
View File

@ -35,6 +35,14 @@ TEXT errors(SB),$0
BL 4(R4) // ERROR "non-zero offset"
ADDF F0, R1, F2 // ERROR "illegal combination"
SWI (R0) // ERROR "illegal combination"
MULAD F0, F1 // ERROR "illegal combination"
MULAF F0, F1 // ERROR "illegal combination"
MULSD F0, F1 // ERROR "illegal combination"
MULSF F0, F1 // ERROR "illegal combination"
NMULAD F0, F1 // ERROR "illegal combination"
NMULAF F0, F1 // ERROR "illegal combination"
NMULSD F0, F1 // ERROR "illegal combination"
NMULSF F0, F1 // ERROR "illegal combination"
NEGF F0, F1, F2 // ERROR "illegal combination"
NEGD F0, F1, F2 // ERROR "illegal combination"
ABSF F0, F1, F2 // ERROR "illegal combination"

12
src/cmd/asm/internal/asm/testdata/armv6.s vendored
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@ -18,6 +18,18 @@ TEXT foo(SB), DUPOK|NOSPLIT, $0
MULD.EQ F3, F4, F5 // 035b240e
MULF.NE F0, F2 // 002a221e
MULD F3, F5 // 035b25ee
NMULF F0, F1, F2 // 402a21ee
NMULF F3, F7 // 437a27ee
NMULD F0, F1, F2 // 402b21ee
NMULD F3, F7 // 437b27ee
MULAF F5, F6, F7 // 057a06ee
MULAD F5, F6, F7 // 057b06ee
MULSF F5, F6, F7 // 457a06ee
MULSD F5, F6, F7 // 457b06ee
NMULAF F5, F6, F7 // 057a16ee
NMULAD F5, F6, F7 // 057b16ee
NMULSF F5, F6, F7 // 457a16ee
NMULSD F5, F6, F7 // 457b16ee
DIVF F0, F1, F2 // 002a81ee
DIVD.EQ F3, F4, F5 // 035b840e
DIVF.NE F0, F2 // 002a821e

10
src/cmd/internal/obj/arm/a.out.go
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@ -230,6 +230,16 @@ const (
ASUBD
AMULF
AMULD
ANMULF
ANMULD
AMULAF
AMULAD
ANMULAF
ANMULAD
AMULSF
AMULSD
ANMULSF
ANMULSD
ADIVF
ADIVD
ASQRTF

10
src/cmd/internal/obj/arm/anames.go
View File

@ -53,6 +53,16 @@ var Anames = []string{
"SUBD",
"MULF",
"MULD",
"NMULF",
"NMULD",
"MULAF",
"MULAD",
"NMULAF",
"NMULAD",
"MULSF",
"MULSD",
"NMULSF",
"NMULSD",
"DIVF",
"DIVD",
"SQRTF",

37
src/cmd/internal/obj/arm/asm5.go
View File

@ -1651,6 +1651,16 @@ func buildop(ctxt *obj.Link) {
opset(ASUBD, r0)
opset(AMULF, r0)
opset(AMULD, r0)
opset(ANMULF, r0)
opset(ANMULD, r0)
opset(AMULAF, r0)
opset(AMULAD, r0)
opset(AMULSF, r0)
opset(AMULSD, r0)
opset(ANMULAF, r0)
opset(ANMULAD, r0)
opset(ANMULSF, r0)
opset(ANMULSD, r0)
opset(ADIVF, r0)
opset(ADIVD, r0)
@ -2259,7 +2269,12 @@ func (c *ctxt5) asmout(p *obj.Prog, o *Optab, out []uint32) {
rt := int(p.To.Reg)
r := int(p.Reg)
if r == 0 {
r = rt
switch p.As {
case AMULAD, AMULAF, AMULSF, AMULSD, ANMULAF, ANMULAD, ANMULSF, ANMULSD:
c.ctxt.Diag("illegal combination: %v", p)
default:
r = rt
}
}
o1 |= (uint32(rf)&15)<<0 | (uint32(r)&15)<<16 | (uint32(rt)&15)<<12
@ -2870,6 +2885,26 @@ func (c *ctxt5) oprrr(p *obj.Prog, a obj.As, sc int) uint32 {
return o | 0xe<<24 | 0x2<<20 | 0xb<<8 | 0<<4
case AMULF:
return o | 0xe<<24 | 0x2<<20 | 0xa<<8 | 0<<4
case ANMULD:
return o | 0xe<<24 | 0x2<<20 | 0xb<<8 | 0x4<<4
case ANMULF:
return o | 0xe<<24 | 0x2<<20 | 0xa<<8 | 0x4<<4
case AMULAD:
return o | 0xe<<24 | 0xb<<8
case AMULAF:
return o | 0xe<<24 | 0xa<<8
case AMULSD:
return o | 0xe<<24 | 0xb<<8 | 0x4<<4
case AMULSF:
return o | 0xe<<24 | 0xa<<8 | 0x4<<4
case ANMULAD:
return o | 0xe<<24 | 0x1<<20 | 0xb<<8
case ANMULAF:
return o | 0xe<<24 | 0x1<<20 | 0xa<<8
case ANMULSD:
return o | 0xe<<24 | 0x1<<20 | 0xb<<8 | 0x4<<4
case ANMULSF:
return o | 0xe<<24 | 0x1<<20 | 0xa<<8 | 0x4<<4
case ADIVD:
return o | 0xe<<24 | 0x8<<20 | 0xb<<8 | 0<<4
case ADIVF: