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cmd/asm,cmd/internal/obj/x86: add RDPID instruction to x86 assembler

Add support for the Read Processor ID (RDPID) instruction to the x86
assembler. This returns the current logical processor's ID in the
specified register, as a faster alternative to RDTSCP.

Fixes #56525

Change-Id: I43482e42431dfc385ce2e7f6d44b9746b0cc4548
Reviewed-on: https://go-review.googlesource.com/c/go/+/482955
Run-TryBot: Joel Sing <joel@sing.id.au>
Reviewed-by: Keith Randall <khr@golang.org>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
TryBot-Result: Gopher Robot <gobot@golang.org>
Reviewed-by: Keith Randall <khr@google.com>
This commit is contained in:
Joel Sing 2023-04-07 06:15:59 +10:00
parent 0d82f584c2
commit 05cd6cbb98
7 changed files with 15 additions and 1 deletions

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@ -33,5 +33,8 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$0
PUSHL FS // 0fa0 PUSHL FS // 0fa0
POPL FS // 0fa1 POPL FS // 0fa1
POPL SS // 17 POPL SS // 17
RDPID AX // f30fc7f8
// End of tests. // End of tests.
RET RET

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@ -1055,5 +1055,9 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$0
TPAUSE BX // 660faef3 TPAUSE BX // 660faef3
UMONITOR BX // f30faef3 UMONITOR BX // f30faef3
UMWAIT BX // f20faef3 UMWAIT BX // f20faef3
RDPID DX // f30fc7fa
RDPID R11 // f3410fc7fb
// End of tests. // End of tests.
RET RET

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@ -144,4 +144,7 @@ TEXT errors(SB),$0
VMOVDQA32.Z Z0, Z1 // ERROR "mask register must be specified for .Z instructions" VMOVDQA32.Z Z0, Z1 // ERROR "mask register must be specified for .Z instructions"
VMOVDQA32.Z Z0, K0, Z1 // ERROR "invalid instruction" VMOVDQA32.Z Z0, K0, Z1 // ERROR "invalid instruction"
VMOVDQA32.Z Z0, K1, Z1 // ok VMOVDQA32.Z Z0, K1, Z1 // ok
RDPID (BX) // ERROR "invalid instruction"
RET RET

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@ -747,6 +747,7 @@ const (
ARDGSBASEL ARDGSBASEL
ARDGSBASEQ ARDGSBASEQ
ARDMSR ARDMSR
ARDPID
ARDPKRU ARDPKRU
ARDPMC ARDPMC
ARDRANDL ARDRANDL

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@ -745,6 +745,7 @@ var Anames = []string{
"RDGSBASEL", "RDGSBASEL",
"RDGSBASEQ", "RDGSBASEQ",
"RDMSR", "RDMSR",
"RDPID",
"RDPKRU", "RDPKRU",
"RDPMC", "RDPMC",
"RDRANDL", "RDRANDL",

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@ -775,7 +775,7 @@ var ymshufb = []ytab{
} }
// It should never have more than 1 entry, // It should never have more than 1 entry,
// because some optab entries you opcode secuences that // because some optab entries have opcode sequences that
// are longer than 2 bytes (zoffset=2 here), // are longer than 2 bytes (zoffset=2 here),
// ROUNDPD and ROUNDPS and recently added BLENDPD, // ROUNDPD and ROUNDPS and recently added BLENDPD,
// to name a few. // to name a few.
@ -1774,6 +1774,7 @@ var optab =
{ALSSW, ym_rl, Pe, opBytes{0x0f, 0xb2}}, {ALSSW, ym_rl, Pe, opBytes{0x0f, 0xb2}},
{ALSSL, ym_rl, Px, opBytes{0x0f, 0xb2}}, {ALSSL, ym_rl, Px, opBytes{0x0f, 0xb2}},
{ALSSQ, ym_rl, Pw, opBytes{0x0f, 0xb2}}, {ALSSQ, ym_rl, Pw, opBytes{0x0f, 0xb2}},
{ARDPID, yrdrand, Pf3, opBytes{0xc7, 07}},
{ABLENDPD, yxshuf, Pq, opBytes{0x3a, 0x0d, 0}}, {ABLENDPD, yxshuf, Pq, opBytes{0x3a, 0x0d, 0}},
{ABLENDPS, yxshuf, Pq, opBytes{0x3a, 0x0c, 0}}, {ABLENDPS, yxshuf, Pq, opBytes{0x3a, 0x0c, 0}},

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@ -1476,6 +1476,7 @@ var unaryDst = map[obj.As]bool{
ARDFSBASEQ: true, ARDFSBASEQ: true,
ARDGSBASEL: true, ARDGSBASEL: true,
ARDGSBASEQ: true, ARDGSBASEQ: true,
ARDPID: true,
ARDRANDL: true, ARDRANDL: true,
ARDRANDQ: true, ARDRANDQ: true,
ARDRANDW: true, ARDRANDW: true,