From 05cd6cbb98a78f04fcfe018527fc8a50364bd0ee Mon Sep 17 00:00:00 2001 From: Joel Sing Date: Fri, 7 Apr 2023 06:15:59 +1000 Subject: [PATCH] cmd/asm,cmd/internal/obj/x86: add RDPID instruction to x86 assembler Add support for the Read Processor ID (RDPID) instruction to the x86 assembler. This returns the current logical processor's ID in the specified register, as a faster alternative to RDTSCP. Fixes #56525 Change-Id: I43482e42431dfc385ce2e7f6d44b9746b0cc4548 Reviewed-on: https://go-review.googlesource.com/c/go/+/482955 Run-TryBot: Joel Sing Reviewed-by: Keith Randall Reviewed-by: Michael Knyszek TryBot-Result: Gopher Robot Reviewed-by: Keith Randall --- src/cmd/asm/internal/asm/testdata/386enc.s | 3 +++ src/cmd/asm/internal/asm/testdata/amd64enc_extra.s | 4 ++++ src/cmd/asm/internal/asm/testdata/amd64error.s | 3 +++ src/cmd/internal/obj/x86/aenum.go | 1 + src/cmd/internal/obj/x86/anames.go | 1 + src/cmd/internal/obj/x86/asm6.go | 3 ++- src/cmd/internal/obj/x86/obj6.go | 1 + 7 files changed, 15 insertions(+), 1 deletion(-) diff --git a/src/cmd/asm/internal/asm/testdata/386enc.s b/src/cmd/asm/internal/asm/testdata/386enc.s index 4af6de36d1..aacb40793e 100644 --- a/src/cmd/asm/internal/asm/testdata/386enc.s +++ b/src/cmd/asm/internal/asm/testdata/386enc.s @@ -33,5 +33,8 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$0 PUSHL FS // 0fa0 POPL FS // 0fa1 POPL SS // 17 + + RDPID AX // f30fc7f8 + // End of tests. RET diff --git a/src/cmd/asm/internal/asm/testdata/amd64enc_extra.s b/src/cmd/asm/internal/asm/testdata/amd64enc_extra.s index 48bdf1bcda..08cb20c707 100644 --- a/src/cmd/asm/internal/asm/testdata/amd64enc_extra.s +++ b/src/cmd/asm/internal/asm/testdata/amd64enc_extra.s @@ -1055,5 +1055,9 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$0 TPAUSE BX // 660faef3 UMONITOR BX // f30faef3 UMWAIT BX // f20faef3 + + RDPID DX // f30fc7fa + RDPID R11 // f3410fc7fb + // End of tests. RET diff --git a/src/cmd/asm/internal/asm/testdata/amd64error.s b/src/cmd/asm/internal/asm/testdata/amd64error.s index 5bd335e303..1ca2d3147c 100644 --- a/src/cmd/asm/internal/asm/testdata/amd64error.s +++ b/src/cmd/asm/internal/asm/testdata/amd64error.s @@ -144,4 +144,7 @@ TEXT errors(SB),$0 VMOVDQA32.Z Z0, Z1 // ERROR "mask register must be specified for .Z instructions" VMOVDQA32.Z Z0, K0, Z1 // ERROR "invalid instruction" VMOVDQA32.Z Z0, K1, Z1 // ok + + RDPID (BX) // ERROR "invalid instruction" + RET diff --git a/src/cmd/internal/obj/x86/aenum.go b/src/cmd/internal/obj/x86/aenum.go index f0913d7c55..79cdd241a2 100644 --- a/src/cmd/internal/obj/x86/aenum.go +++ b/src/cmd/internal/obj/x86/aenum.go @@ -747,6 +747,7 @@ const ( ARDGSBASEL ARDGSBASEQ ARDMSR + ARDPID ARDPKRU ARDPMC ARDRANDL diff --git a/src/cmd/internal/obj/x86/anames.go b/src/cmd/internal/obj/x86/anames.go index 7869e366f9..3966381e50 100644 --- a/src/cmd/internal/obj/x86/anames.go +++ b/src/cmd/internal/obj/x86/anames.go @@ -745,6 +745,7 @@ var Anames = []string{ "RDGSBASEL", "RDGSBASEQ", "RDMSR", + "RDPID", "RDPKRU", "RDPMC", "RDRANDL", diff --git a/src/cmd/internal/obj/x86/asm6.go b/src/cmd/internal/obj/x86/asm6.go index 0e8670c8e5..718da6a8a2 100644 --- a/src/cmd/internal/obj/x86/asm6.go +++ b/src/cmd/internal/obj/x86/asm6.go @@ -775,7 +775,7 @@ var ymshufb = []ytab{ } // It should never have more than 1 entry, -// because some optab entries you opcode secuences that +// because some optab entries have opcode sequences that // are longer than 2 bytes (zoffset=2 here), // ROUNDPD and ROUNDPS and recently added BLENDPD, // to name a few. @@ -1774,6 +1774,7 @@ var optab = {ALSSW, ym_rl, Pe, opBytes{0x0f, 0xb2}}, {ALSSL, ym_rl, Px, opBytes{0x0f, 0xb2}}, {ALSSQ, ym_rl, Pw, opBytes{0x0f, 0xb2}}, + {ARDPID, yrdrand, Pf3, opBytes{0xc7, 07}}, {ABLENDPD, yxshuf, Pq, opBytes{0x3a, 0x0d, 0}}, {ABLENDPS, yxshuf, Pq, opBytes{0x3a, 0x0c, 0}}, diff --git a/src/cmd/internal/obj/x86/obj6.go b/src/cmd/internal/obj/x86/obj6.go index c85b5018eb..8c9ea4f2a9 100644 --- a/src/cmd/internal/obj/x86/obj6.go +++ b/src/cmd/internal/obj/x86/obj6.go @@ -1476,6 +1476,7 @@ var unaryDst = map[obj.As]bool{ ARDFSBASEQ: true, ARDGSBASEL: true, ARDGSBASEQ: true, + ARDPID: true, ARDRANDL: true, ARDRANDQ: true, ARDRANDW: true,