2013-03-21 09:32:02 -06:00
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// Copyright 2013 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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2013-08-12 11:25:36 -06:00
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#include "../../../cmd/ld/textflag.h"
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2013-03-21 09:32:02 -06:00
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// SHA1 block routine. See sha1block.go for Go equivalent.
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//
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// There are 80 rounds of 4 types:
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// - rounds 0-15 are type 1 and load data (ROUND1 macro).
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// - rounds 16-19 are type 1 and do not load data (ROUND1x macro).
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// - rounds 20-39 are type 2 and do not load data (ROUND2 macro).
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// - rounds 40-59 are type 3 and do not load data (ROUND3 macro).
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// - rounds 60-79 are type 4 and do not load data (ROUND4 macro).
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//
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// Each round loads or shuffles the data, then computes a per-round
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// function of b, c, d, and then mixes the result into and rotates the
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// five registers a, b, c, d, e holding the intermediate results.
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//
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// The register rotation is implemented by rotating the arguments to
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// the round macros instead of by explicit move instructions.
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// Like sha1block_amd64.s, but we keep the data and limit pointers on the stack.
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// To free up the word pointer (R10 on amd64, DI here), we add it to e during
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// LOAD/SHUFFLE instead of during MIX.
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//
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// The stack holds the intermediate word array - 16 uint32s - at 0(SP) up to 64(SP).
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// The saved a, b, c, d, e (R11 through R15 on amd64) are at 64(SP) up to 84(SP).
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// The saved limit pointer (DI on amd64) is at 84(SP).
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// The saved data pointer (SI on amd64) is at 88(SP).
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#define LOAD(index, e) \
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MOVL 88(SP), SI; \
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MOVL (index*4)(SI), DI; \
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BSWAPL DI; \
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MOVL DI, (index*4)(SP); \
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ADDL DI, e
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#define SHUFFLE(index, e) \
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MOVL (((index)&0xf)*4)(SP), DI; \
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XORL (((index-3)&0xf)*4)(SP), DI; \
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XORL (((index-8)&0xf)*4)(SP), DI; \
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XORL (((index-14)&0xf)*4)(SP), DI; \
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ROLL $1, DI; \
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MOVL DI, (((index)&0xf)*4)(SP); \
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ADDL DI, e
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#define FUNC1(a, b, c, d, e) \
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MOVL b, SI; \
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ANDL c, SI; \
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MOVL b, DI; \
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NOTL DI; \
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ANDL d, DI; \
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ORL SI, DI
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#define FUNC2(a, b, c, d, e) \
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MOVL b, DI; \
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XORL c, DI; \
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XORL d, DI
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#define FUNC3(a, b, c, d, e) \
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MOVL b, SI; \
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ORL c, SI; \
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ANDL d, SI; \
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MOVL b, DI; \
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ANDL c, DI; \
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ORL SI, DI
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#define FUNC4 FUNC2
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#define MIX(a, b, c, d, e, const) \
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ROLL $30, b; \
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ADDL DI, e; \
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MOVL a, SI; \
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ROLL $5, SI; \
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LEAL const(e)(SI*1), e
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#define ROUND1(a, b, c, d, e, index) \
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LOAD(index, e); \
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FUNC1(a, b, c, d, e); \
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MIX(a, b, c, d, e, 0x5A827999)
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#define ROUND1x(a, b, c, d, e, index) \
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SHUFFLE(index, e); \
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FUNC1(a, b, c, d, e); \
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MIX(a, b, c, d, e, 0x5A827999)
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#define ROUND2(a, b, c, d, e, index) \
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SHUFFLE(index, e); \
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FUNC2(a, b, c, d, e); \
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MIX(a, b, c, d, e, 0x6ED9EBA1)
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#define ROUND3(a, b, c, d, e, index) \
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SHUFFLE(index, e); \
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FUNC3(a, b, c, d, e); \
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MIX(a, b, c, d, e, 0x8F1BBCDC)
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#define ROUND4(a, b, c, d, e, index) \
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SHUFFLE(index, e); \
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FUNC4(a, b, c, d, e); \
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MIX(a, b, c, d, e, 0xCA62C1D6)
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// func block(dig *digest, p []byte)
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2013-08-12 11:25:36 -06:00
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TEXT ·block(SB),NOSPLIT,$92-16
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2013-03-21 09:32:02 -06:00
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MOVL dig+0(FP), BP
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MOVL p+4(FP), SI
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2013-03-22 10:57:55 -06:00
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MOVL p_len+8(FP), DX
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2013-03-21 09:32:02 -06:00
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SHRL $6, DX
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SHLL $6, DX
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LEAL (SI)(DX*1), DI
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MOVL (0*4)(BP), AX
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MOVL (1*4)(BP), BX
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MOVL (2*4)(BP), CX
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MOVL (3*4)(BP), DX
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MOVL (4*4)(BP), BP
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CMPL SI, DI
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JEQ end
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MOVL DI, 84(SP)
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loop:
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MOVL SI, 88(SP)
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MOVL AX, 64(SP)
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MOVL BX, 68(SP)
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MOVL CX, 72(SP)
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MOVL DX, 76(SP)
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MOVL BP, 80(SP)
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ROUND1(AX, BX, CX, DX, BP, 0)
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ROUND1(BP, AX, BX, CX, DX, 1)
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ROUND1(DX, BP, AX, BX, CX, 2)
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ROUND1(CX, DX, BP, AX, BX, 3)
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ROUND1(BX, CX, DX, BP, AX, 4)
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ROUND1(AX, BX, CX, DX, BP, 5)
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ROUND1(BP, AX, BX, CX, DX, 6)
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ROUND1(DX, BP, AX, BX, CX, 7)
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ROUND1(CX, DX, BP, AX, BX, 8)
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ROUND1(BX, CX, DX, BP, AX, 9)
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ROUND1(AX, BX, CX, DX, BP, 10)
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ROUND1(BP, AX, BX, CX, DX, 11)
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ROUND1(DX, BP, AX, BX, CX, 12)
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ROUND1(CX, DX, BP, AX, BX, 13)
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ROUND1(BX, CX, DX, BP, AX, 14)
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ROUND1(AX, BX, CX, DX, BP, 15)
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ROUND1x(BP, AX, BX, CX, DX, 16)
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ROUND1x(DX, BP, AX, BX, CX, 17)
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ROUND1x(CX, DX, BP, AX, BX, 18)
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ROUND1x(BX, CX, DX, BP, AX, 19)
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ROUND2(AX, BX, CX, DX, BP, 20)
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ROUND2(BP, AX, BX, CX, DX, 21)
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ROUND2(DX, BP, AX, BX, CX, 22)
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ROUND2(CX, DX, BP, AX, BX, 23)
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ROUND2(BX, CX, DX, BP, AX, 24)
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ROUND2(AX, BX, CX, DX, BP, 25)
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ROUND2(BP, AX, BX, CX, DX, 26)
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ROUND2(DX, BP, AX, BX, CX, 27)
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ROUND2(CX, DX, BP, AX, BX, 28)
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ROUND2(BX, CX, DX, BP, AX, 29)
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ROUND2(AX, BX, CX, DX, BP, 30)
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ROUND2(BP, AX, BX, CX, DX, 31)
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ROUND2(DX, BP, AX, BX, CX, 32)
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ROUND2(CX, DX, BP, AX, BX, 33)
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ROUND2(BX, CX, DX, BP, AX, 34)
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ROUND2(AX, BX, CX, DX, BP, 35)
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ROUND2(BP, AX, BX, CX, DX, 36)
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ROUND2(DX, BP, AX, BX, CX, 37)
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ROUND2(CX, DX, BP, AX, BX, 38)
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ROUND2(BX, CX, DX, BP, AX, 39)
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ROUND3(AX, BX, CX, DX, BP, 40)
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ROUND3(BP, AX, BX, CX, DX, 41)
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ROUND3(DX, BP, AX, BX, CX, 42)
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ROUND3(CX, DX, BP, AX, BX, 43)
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ROUND3(BX, CX, DX, BP, AX, 44)
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ROUND3(AX, BX, CX, DX, BP, 45)
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ROUND3(BP, AX, BX, CX, DX, 46)
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ROUND3(DX, BP, AX, BX, CX, 47)
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ROUND3(CX, DX, BP, AX, BX, 48)
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ROUND3(BX, CX, DX, BP, AX, 49)
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ROUND3(AX, BX, CX, DX, BP, 50)
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ROUND3(BP, AX, BX, CX, DX, 51)
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ROUND3(DX, BP, AX, BX, CX, 52)
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ROUND3(CX, DX, BP, AX, BX, 53)
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ROUND3(BX, CX, DX, BP, AX, 54)
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ROUND3(AX, BX, CX, DX, BP, 55)
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ROUND3(BP, AX, BX, CX, DX, 56)
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ROUND3(DX, BP, AX, BX, CX, 57)
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ROUND3(CX, DX, BP, AX, BX, 58)
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ROUND3(BX, CX, DX, BP, AX, 59)
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ROUND4(AX, BX, CX, DX, BP, 60)
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ROUND4(BP, AX, BX, CX, DX, 61)
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ROUND4(DX, BP, AX, BX, CX, 62)
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ROUND4(CX, DX, BP, AX, BX, 63)
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ROUND4(BX, CX, DX, BP, AX, 64)
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ROUND4(AX, BX, CX, DX, BP, 65)
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ROUND4(BP, AX, BX, CX, DX, 66)
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ROUND4(DX, BP, AX, BX, CX, 67)
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ROUND4(CX, DX, BP, AX, BX, 68)
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ROUND4(BX, CX, DX, BP, AX, 69)
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ROUND4(AX, BX, CX, DX, BP, 70)
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ROUND4(BP, AX, BX, CX, DX, 71)
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ROUND4(DX, BP, AX, BX, CX, 72)
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ROUND4(CX, DX, BP, AX, BX, 73)
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ROUND4(BX, CX, DX, BP, AX, 74)
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ROUND4(AX, BX, CX, DX, BP, 75)
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ROUND4(BP, AX, BX, CX, DX, 76)
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ROUND4(DX, BP, AX, BX, CX, 77)
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ROUND4(CX, DX, BP, AX, BX, 78)
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ROUND4(BX, CX, DX, BP, AX, 79)
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ADDL 64(SP), AX
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ADDL 68(SP), BX
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ADDL 72(SP), CX
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ADDL 76(SP), DX
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ADDL 80(SP), BP
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MOVL 88(SP), SI
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ADDL $64, SI
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CMPL SI, 84(SP)
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JB loop
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end:
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MOVL dig+0(FP), DI
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MOVL AX, (0*4)(DI)
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MOVL BX, (1*4)(DI)
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MOVL CX, (2*4)(DI)
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MOVL DX, (3*4)(DI)
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MOVL BP, (4*4)(DI)
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RET
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